Yonsei University

Skhynix Inc.

Juhyun Park

Seongook Jung

Sungho Park

Seung Ho Lee

Jiyoung Kim

Kyoman Kang

Hanwool Jeong

Young Hwi Yang

Wonjoon Jo

Giseok Kim

Jungchan Lee

An error handling device includes a cross-voltage sense amplifier and an error handling circuit. The cross-voltage sense amplifier is configured to perform a normal sense operation and a cross sense operation. The normal sense operation generates normal sense data by providing an input voltage and a comparison voltage to first and second inputs of a comparator, respectively. The cross sense operation generates cross sense data by providing the input voltage and the comparison voltage to the second and first inputs of the comparator, respectively. The error handling circuit identifies a location of an error using the normal sense data and the cross sense data and corrects the error.

Error handling device, semiconductor memory device including the same, and error handling method including cross sensing operation

Disclosed is a memory device. The memory device includes a bit-cell comprising a cross-coupled inverter and pass gate transistor connected to data storage node of the cross-coupled inverter, a read buffer transistor having a drain terminal connected to a bit line for read operation and a gate terminal connected to the pass gate transistor, a write operation transistor connected between the pass gate transistor and a bit line for write operation, and a drive transistor unit which is connected to a local line between the pass gate transistors and the write operation transistor and which provide a voltage to a gate terminal of the read buffer transistor based on a data value stored at the bit-cell.

Memory device

Growing community of inventors

Icheon, South Korea

Juhyun Park