Samsung Electronics Co., Ltd.

Juhyeon Oh

Hyunki Kim

Yongkwan Lee

Sunchul Kim

Jongwan Kim

Kyong Hwan Koh

Woojin Choi

A semiconductor package includes a first substrate, a second substrate provided on the first substrate, a semiconductor chip provided between the first substrate and the second substrate, solder structures extending between the first substrate and the second substrate and spaced apart from the semiconductor chip, and bumps provided between the semiconductor chip and the second substrate. The solder structures electrically connect the first substrate and the second substrate.

Semiconductor package

A semiconductor package including a substrate including at least one ground pad and a ground pattern; a semiconductor chip on the substrate; and a shield layer on the substrate and covering the semiconductor chip, wherein the shield layer extends onto a bottom surface of the substrate and includes an opening region on the bottom surface of the substrate, a bottom surface of the at least one ground pad is at the bottom surface of the substrate, a side surface of the ground pattern is at a side surface of the substrate, and the shield layer on the bottom surface of the substrate is in contact with the bottom surface of the at least one ground pad and in contact with the side surface of the ground pattern.

A semiconductor package includes a base substrate that includes a first surface and a second surface that face each other, a plurality of first metal line patterns disposed on the first surface, a plurality of second metal line patterns disposed on the second surface, a plurality of vias that penetrate the base substrate and connect the first metal line patterns to the second metal line patterns, a semiconductor chip disposed on the first surface, and a molding member that covers the first surface and the semiconductor chip. The base substrate includes at least one recess at a corner of the base substrate. The recess extends from the first surface toward the second surface. The molding member includes a protrusion that fills the recess.

Semiconductor package including plurality of recesses and molding member with plurality of protrusions that fill the recesses

A semiconductor package may include a substrate having an upper surface on which a plurality of first pads are disposed and a lower surface on which a plurality of second pads are disposed. The semiconductor package may further include a semiconductor chip disposed on the upper surface of the substrate on which connection electrodes connected to a first set of the plurality of first pads are disposed. The semiconductor package may include an interposer having an upper surface on which a plurality of first connection pads, connected to a second set of the plurality of first pads, and a plurality of second connection pads are disposed. The semiconductor package may further include a plurality of connection terminals disposed on a set of the plurality of second connection pads of the interposer, and a molding material disposed on the upper surface of the substrate.

Growing community of inventors

Asan-si, South Korea

Juhyeon Oh