Nxp B.v.

Freescale Semiconductor,inc.

Juhui Li

Massimo Ciacci

Ghiath Al-kadi

Remco Cornelis Herman Van De Beek

Liang Zhang

Tae-Hyoung Kim

Alan Chang

Van-Loi Le

Alan Yeow Khai Chang

Adaickalavan Meiyappan

Ghiath Al-Kadi

LiSong Feng

A differential detector for a receiver and a method of detecting the value of symbols of a signal is disclosed. In particular, a detector comprising: an analog to digital converter for sampling samples from symbols of a signal; a differentiator configured to differentiate the samples with a transfer function to produce a differentiated series of samples for each symbol; and a decision device configured to determine the value of each symbol by comparing values of the differentiated series of samples with boundary condition values.

Detector

A system and module for, and a method of correcting, memory misalignment in a phase shift keying receiver is disclosed. Embodiments include a system having: an analog front end for receiving a demodulated signal having a preamble portion, and for generating a digital register input signal including a received preamble portion; a finite state machine for selecting a memory address of the demodulated signal based on the received preamble portion; a preamble memory for storing all possible preambles contained within the demodulated signal and for supplying a selected preamble memory output corresponding to the selected memory address; and a memory alignment module configured to compare phase information of symbols of the preamble portion and preamble phase information of symbols of the selected preamble memory output. This system checks that the preamble portion of the register input signal aligns with the selected preamble memory output and makes corrections when necessary.

Memory misalignment correction

The present disclosure relates in general to devices, systems and methods for wireless communication, and in particular to communication using a proximity integrated circuit card (PICC). Example embodiments include a circuit () for a PICC, the circuit comprising an input stage (), a decoding module () and a bias adjustment module (), the bias adjustment module () configured to receive an output code from the decoding module and provide a bias adjustment signal to the input stage (), the bias adjustment module () configured to iteratively tune the bias adjustment signal based on a measurement of the output code, with successive steps tuning the bias adjustment signal by a smaller amount until the output code is within a decoding range.

Adaptive bias tuning

A 24-transistor D flip-flop circuit operates in a sampling mode when a clock signal has a first voltage state, and a holding mode when the clock signal has a second voltage state. The flip-flop circuit includes an internal control node coupled to a reference voltage node by way of a transistor controllable to couple the internal control node to the reference voltage node when the clock signal has the second voltage state. The flip-flop has very low power dissipation as it includes a 4-transistor change-sense component to detect changes in input data. The change-sense component is coupled in series with the transistor and receives an indication of an input voltage state of the flip-flop circuit and an indication of an output voltage state of the flip-flop circuit, and inhibits toggling of the internal control node if the indicated input voltage state and the indicated output voltage state are the same.

Low power flip-flop circuit

Growing community of inventors

Singapore, Singapore

Juhui Li