Texas Instruments Corporation

Juergen Luebbe

Qunying Li

Robert E Whyte, Jr

Roland Karl Son

Sujan Kundapur Manohar

Eddie W Yu

Scott Robert Summerfelt

Steven Craig Bartling

Sudhanshu Khanna

Wei-Yan Shih

Gregory Allen North

Michael Zwerg

John Kevin Rote

Wenxiao Tan

David R Street

Fredrick W Trafton

Dongjie Cheng

Tuan Van Tran

Joao Carlos Felicio Brito

Seil Oh

Quang Dieu An

Tanchu Shih

Emmanuel Osei Boakye

Julio Enrique Ayala, Ii

Leah Trautmann

In described examples, a power interface subsystem includes power transistors, each having: a conduction path coupled between a battery terminal and an accessory terminal; and a control terminal. A differential amplifier has: a first input coupled to the battery terminal; a second input coupled to the accessory terminal; and an output node. An offset voltage source is coupled to cause an offset of a selected polarity at one of the inputs to the differential amplifier. The offset has a first polarity in a first operating mode and a second polarity in a second operating mode. Gate control circuitry is coupled to apply a control level at the control terminal(s) of selected one(s) of the power transistors responsive to a voltage at the output node, and to apply an off-state control level to the control terminal(s) of unselected one(s) of the power transistors.

Reverse current protection circuit

A piezoelectric sensor with: (i) a capacitive element, comprising piezoelectric material; (ii) a pre-conditioning circuit, comprising circuitry for establishing a polarization of the capacitive element in a polarizing mode; and (iii) signal amplification circuitry for providing a piezoelectric-responsive output signal, in response to charge across the capacitive element in a sensing mode.

Piezoelectric sensing apparatus and method

An integrated circuit includes a motor current input voltage-to-current (VI) converter that receives a motor current sensor voltage from a motor and a reference voltage to generate an output current related to a motor's current. A motor current calibration VI converter compensates for errors in the motor current input VI converter and generates a calibration output current based on the reference voltage, wherein the output current and the calibration output current are combined to form an estimate of the motor's current.

Back EMF monitor for motor control

A circuit includes a driver circuit having a high side switch device and a low side switch device coupled to a load voltage node and a motor winding output. A controller operates the high side switch device and the low side switch device. The controller operates in a normal mode to supply current to the motor winding output for driving a motor winding when an external power supply is available to supply the load voltage node. In response to detecting a loss of the external power supply, the controller operates the high side switch device and the low side switch device in a boost mode to utilize a back electromotive force (BEMF) voltage from the motor winding to supply current to the load voltage node.

Configuration, frequency registers generating power from motor in supply-loss event

In described examples, a transistor has: a source and a drain coupled between a supply voltage and an output terminal; and a gate terminal. A charge pump has: an output node coupled to the gate terminal; and a clock input. An oscillator is coupled to generate a clock signal. A clock enable circuit is coupled to: receive the clock signal; and selectively output the clock signal to the clock input, responsive to an enable signal. A comparator is coupled to output the enable signal in response to a comparison between a reference current and a current through a series resistor. The series resistor is coupled to the gate terminal.

Methods and apparatus for a configurable high-side NMOS gate control with improved gate to source voltage regulation

A system for implementing current shaping for retract of a voice coil motor (VCM) includes drive circuitry coupled to drive the VCM according to a logic state of the system. Current shaping circuitry is configured to temporarily decrease the bandwidth of a VCM transconductance loop in response to a control signal. The transconductance loop includes at least the VCM, the current shaping circuitry and the drive circuitry. The system also includes logic configured to provide the control signal at an end portion a drive logic state to enter a current shaping logic state as a transition from the drive logic state to a floating logic state to reduce current through the VCM such that acoustic emissions from the VCM are mitigated during the retract.

System and method of current shaping control for retract

An electrical apparatus comprising an amplifier having a first input, a second input, and an output. The apparatus further comprises a first electrical path coupled to the first input and having a first resistance and a first electrical path coupled to the second input and having a second resistance. The apparatus further comprises a second electrical path coupled to the second input and having a third resistance and a second electrical path, comprising an electrically-controllable resistance, coupled between the output and the first input. Further, the apparatus comprises circuitry for controlling the electrically-controllable resistance for adjusting a ratio between the electrically-controllable resistance and the third resistance to approximate a ratio between the first resistance and the second resistance.

Single-ended gain stage and disk drive

One embodiment of the invention includes an on-chip current-sense system for measuring a magnitude of an output current through a power transistor. The system includes a first sense transistor that conducts a first reference current to or from a phase node and a second sense transistor configured to conduct a second reference current to or from a power rail. The first and second sense transistors can be substantially identical and can be proportionally matched to the power transistor. An OTA receives the first and second reference currents and a third reference current that flows to or from the phase node and generates a sense current that is proportional to the output current in response to the first, second, and third reference currents. A sense circuit compares the sense current with a predetermined magnitude and generates an over-current signal in response to the sense current being greater than the predetermined magnitude to indicate an over-current condition of the output current.

On-chip current sensing

One embodiment of the invention includes a hysteretic power regulator system. The system includes a switching stage configured to periodically couple an input voltage to an inductor in response to a control signal to generate an output voltage. The system also includes a hysteretic control stage configured to generate the control signal based on a comparison of a feedback voltage associated with the output voltage and a predetermined reference voltage. The system also includes a feed-forward stage configured to generate a feed-forward ramp voltage in response to the control signal. The feed-forward ramp voltage can be added to the feedback voltage to set a frequency of the control signal. The system further includes a compensation stage configured to cancel a DC error associated with the feed-forward ramp voltage relative to the feedback voltage to substantially mitigate errors associated with the output voltage.

Feed-forward compensation for a hysteretic switching regulator

System and method for high-speed and high-precision digital to analog conversion. A preferred embodiment comprises a dual-resistor ladder digital-to-analog converter with a coarse resistor ladder and a fine resistor ladder, wherein resistors in the fine resistor ladder are implemented using transistors. When the effective resistances of switches used in a switching circuit are properly matched with the resistance of the resistors, the differential non-linearity and the integral non-linearity of the digital-to-analog converter can be minimized. The use of transistors to implement switches and resistors can help to eliminate mismatches arising from different fabrication steps and materials, further improving the performance of the digital-to-analog converter.

Digital-to-analog converter with triode region transistors in resistor/switch network

A configurable voltage regulator () operable in either of two selectable modes or topologies is disclosed. In one disclosed embodiment, the voltage regulator () can operate as a charge pump regulator or a switching regulator, to generate a negative polarity regulated voltage. The voltage regulator () includes an output driver (), for example including first and second drive transistors (A,B), that are used in both of the selectable modes.

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Fairview, TX, United States of America

Juergen Luebbe