Infineon Technologies Ag

Qimonda Ag

Juergen Grafe

Steffen Kroehnert

Harry Hedler

Maksim Kuzmenka

Martin Reiss

Jochen Thomas

Ingo Wennemuth

Anton Legen

Manuel Carmona

Kashi Vishwanath Machani

Kerstin Nocke

Minka Gospodinova-Daltcheva

A semiconductor device is disclosed. At least one semiconductor chip is mounted on a substrate and is contacted to contact elements of the substrate. The encapsulation of the semiconductor chip includes the substrate, a cover and a pocket within the connected substrate and cover. The pocket is able to fix the chip in its position, and the cover is composed of the same material as the substrate.

Semiconductor device with chip mounted on a substrate

Packaging systems and methods for semiconductor devices are disclosed. In one embodiment, a packaging system includes a first plate having a first coefficient of thermal expansion (CTE). An integrated circuit is mountable to the first plate. The packaging system includes a second plate coupleable over the first plate over the integrated circuit. The second plate has a second CTE that is substantially a same CTE as the first CTE. A plurality of solder balls is coupleable to the first plate or the second plate and to the integrated circuit.

Packaging systems and methods

An electronic component includes a base and a chip attached to the base by a plurality of adhesive pads that are spaced apart from one another and are arranged in an intermediate space between the chip and the base. The chip is electrically connected to interconnects of the base. The adhesive pads are partitioned in a regular distribution over the entire surface area of the chip. A molding compound surrounds the chip and is disposed in the intermediate space between the chip and the base.

Method for mounting a chip on a base and arrangement produced by this method

The invention relates to an FBGA arrangement, comprising a substrate on which at least one chip is chip-bonded face-down, which has a central row of bonding pads connected to contact islands (landing pads) on the substrate by a bonding channel in the substrate via wire bridges, which substrate, for its part, is provided with soldering balls&#x2014;arranged in an array&#x2014;for contact connection to a printed circuit board, and the contact islands and the soldering balls being connected to one another via a rewiring of the substrate. The preferred embodiment of the invention is intended to provide an FBGA arrangement which supports the center pad row technology and at the same time has low electrical parasitics. This is achieved by virtue of the fact that at least two substrates () are provided, the substrates () are provided substratewise in each case with bonding channels () having different dimensions, in a manner forming a multistage bonding channel, the bonding channels () in the ball-side substrate () having larger dimensions than those in the chip-side substrate ().

FBGA arrangement

Growing community of inventors

Dresden, Germany

Juergen Grafe