Other

Candescent Technologies Corporation

Sony Corporation

Candescent Intellectual Property Services, Inc.

Jueng-Gil Lee

Matthew A Bonn

Kazuo Kikuchi

Hidenori Kemmotsu

Theodore S Fahlen

Paul N Ludwig

Melissa Skocypec

The present invention provides a method of fabricating a cathode requiring relatively few and somewhat simple steps. In one embodiment, a novel etchant gas chemistry dispenses with needing a second passivation layer. In one embodiment, a direct via is formed without a separate mask. In one embodiment, access and isolation features of a metallic gate are patterned in the same patterning operation as an associated passivation layer, dispensing with a need for separate patterning of each. In one embodiment, etching is effectuated with high selectivity for nitrides of silicon. In one embodiment, the requirement for at least one passivation layer deposition, a direct via masking step, and separate patterning steps for the passivation layer and metallic gate are eliminated. This effectively eliminates or substantially reduces associated costs, concomitantly reducing process completion time. Advantageously, this increases efficiency and productivity, correspondingly reducing fabrication costs and unit costs of finished devices.

Method for implementing an efficient and economical cathode process

One embodiment of the present invention provides a method of fabricating a cathode requiring relatively few and somewhat simple steps. One embodiment also provides a method of fabricating a cathode which eliminates a direct via masking step. One embodiment provides a method of fabricating a cathode which reduces manufacturing costs and increases the efficiency and productivity of manufacturing lines engaged in cathode fabrication. One embodiment provides a method of fabricating a cathode, which reduces the unit cost of thin CRTs. In one embodiment, a novel method effectuates fabrication of a cathode by a process requiring relatively few and somewhat simpler steps. Importantly, in the present embodiment, the requirement for at least one conventionally required direct via masking steps is eliminated. This effectively eliminates or substantially reduces associated costs, concomitantly reducing process completion time. Advantageously, this increases efficiency and productivity, correspondingly reducing fabrication costs and unit costs of finished devices.

Method for implementing a 6-mask cathode process

An embodiment of the present invention provides a method of fabricating a cathode requiring relatively few and somewhat simple steps. One embodiment provides a method of fabricating a cathode in which the passivation layer and the metallic gate chromium are masked and patterned simultaneously. The method effectuates patterning of the passivation layer as necessary and simultaneously fixes a location for both access spots and inter-pixel electrical isolation areas to chromium constituting the metallic gate. Importantly, the present implementation effectively eliminates a conventionally requisite subsequent metallic gate chromium masking and etching step. Advantageously, this effectively streamlines and economizes cathode fabrication. The present embodiment thus reduces manufacturing costs and increases the efficiency and productivity of manufacturing lines engaged in cathode fabrication. This effectively reduces the unit cost of flat panel CRTs. In one embodiment, a novel method effectuates fabrication of a cathode by a process requiring relatively few and somewhat simpler steps.

Method for implementing a 7-mask cathode process

A method for attaching a faceplate and a backplate of a field emission display device. Specifically, one embodiment of the present invention discloses a method for protecting a silicon nitride passivation layer from reacting with a glass frit sealing material that contains lead oxide during an oven sealing or laser sealing process. The passivation layer protects row and column electrodes in the display device. A barrier material fully encapsulates the silicon nitride passivation layer. In one embodiment, silicon dioxide is the barrier material. In another embodiment, spin-on-glass is the barrier material. In still another embodiment, cermet is the barrier material.

Frit protection in sealing process for flat panel displays

One embodiment of the present invention provides a method of fabricating a cathode requiring relatively few and somewhat simple steps. One embodiment also provides a method of fabricating a cathode which eliminates a passivation layer masking step. One embodiment provides a method of fabricating a cathode which reduces manufacturing costs and increases the efficiency and productivity of manufacturing lines engaged in cathode fabrication. One embodiment provides a method of fabricating a cathode, which reduces the unit cost of thin CRTs. In one embodiment, a novel method effectuates fabrication of a cathode by a process requiring relatively few and somewhat simpler steps. Importantly, in the present embodiment, the requirement for at least one conventionally required passivation layer masking steps is eliminated. This effectively eliminates or substantially reduces associated costs, concomitantly reducing process completion time. Advantageously, this increases efficiency and productivity, correspondingly reducing fabrication costs and unit costs of finished devices.

Growing community of inventors

Cupertino, CA, United States of America

Jueng-Gil Lee