Taiwan Semiconductor Manufacturing Comp. Ltd.

Jue-Chin Yu

Ru-Gun Liu

Shih-Ming Chang

Shinn-Sheng Yu

Ping-Chieh Wu

Chin-Hsiang Lin

Chih-Ming Lai

Hsu-Ting Huang

Shuo-Yen Chou

Pi-Tsung Chen

Shih-Hsiang Lo

Tung-Chin Wu

Lun Hsieh

A method includes generating a diffraction map from a plurality of target patterns, generating a favorable zone and an unfavorable zone from the diffraction map, placing a plurality of sub-resolution patterns in the favorable zone, and performing a plurality of geometric operations on the plurality of sub-resolution patterns to generate modified sub-resolution patterns. The modified sub-resolution patterns extend into the favorable zone, and are away from the unfavorable zone.

Geometric mask rule check with favorable and unfavorable zones

A method for manufacturing a lithographic mask for an integrated circuit includes performing an optical proximity correction (OPC) process to an integrated circuit mask layout to produce a corrected mask layout. The method further includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout. The method also includes performing an inverse lithographic technology (ILT) process to the corrected mask layout to enhance the corrected mask layout to produce an OPC-ILT-enhanced mask layout.

Method for mask data synthesis with wafer target adjustment

Provided is a method of transforming an integrated circuit (IC) pattern into one or more patterns suitable for subsequent processing, such as mask fabrication. The method includes receiving an IC pattern that has an arbitrary shape, and using a computer, deriving an approximation IC pattern that is a user-defined fabrication-friendly shape, such as a rectangle or an ellipse. The method further includes calculating a pattern approximation error between the IC pattern and the approximation IC pattern. The method further includes checking whether the pattern approximation error is less than a user-defined threshold. If it is, the method further includes replacing the IC pattern with the approximation IC pattern for subsequent fabrication. Otherwise, the method further includes splitting the IC pattern into subparts, and recursively transforming each of the subparts.

Method for integrated circuit mask patterning

Provided is a method of transforming an integrated circuit (IC) pattern into one or more patterns suitable for subsequent processing, such as mask fabrication. The method includes receiving an IC pattern that has an arbitrary shape, and using a computer, deriving an approximation IC pattern, wherein the approximation IC pattern is in a shape that is a user-defined fabrication-friendly shape, such as a rectangle or an ellipse. The method further includes calculating a pattern approximation error between the IC pattern and the approximation IC pattern. The method further includes checking whether the pattern approximation error is less than a user-defined threshold. If it is, the method further includes outputting the approximation IC pattern for subsequent fabrication. Otherwise, the method further includes splitting the IC pattern into a plurality of subparts, and recursively transforming each of the plurality of subparts.

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Taichung, Taiwan

Jue-Chin Yu