U.S. Philips Corporation

Judocus A Lammerts

Roelof H Salters

Richard C Foss

Michael J Tooher

Willem G Ritzerfeld

An integrated circuit with a memory, includes a matrix of memory cells and sense amplifiers which are coupled thereto, with the inputs of the sense amplifiers being connected to one another and the outputs of the sense amplifiers being connected to one another via a read bus. During the reading of information from a memory cell, the sense amplifiers are simultaneously activated. As a result, the access time for reading information from a a memory cell remains substantially constant when the number of memory columns to be connected in parallel is changed. The dimensioning of the sense amplifiers may remain the same when the number of memory columns is changed, so that dimensioning need be performed only once. This results in a saving as regards time and costs.

Integrated memory circuit with interconnected sense amplifiers

An integrated memory circuit in which memory cells are arranged in rows and columns, each column having a separate sense amplifier. The memory columns can be coupled to neighboring memory columns by additional transistors and the gain of the sense amplifiers in the even and the odd columns is adjustable. Consequently, information can also be serially shifted from one column to another, so that the information can be written and read not only in parallel but also serially.

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Eindhoven, Netherlands

Judocus A Lammerts