Qualcomm Incorporated

Judith LaRocca

Ephraim Zehavi

David S Miller

Jeffrey Alexander Levin

Senthil Kumar Govindaswamy

Jeff A Levin

A Chris Irvine

Ann Chris Irvine

A variable rate transmission system where a packet of variable rate data is transmitted on a traffic channel if the capacity of the traffic channel is greater than or equal to the data rate of the packet. When the rate of the packet of variable rate data exceeds the capacity of the traffic channel, the packet is transmitted on a traffic channel and at least one overflow channel. Also described is a receiving system for receiving and reassembling the data transmitted on the traffic channel and at least one additional overflow channel.

Method and apparatus for providing variable rate data in a communications system using non-orthogonal overflow channels

An apparatus to determine the inverse transform of a block of encoded data the block of encoded data comprising a plurality of compressed frequency domain data elements. An input register is configured to receive a predetermined quantity of data elements. At least one butterfly processor is coupled to the input register and is configured to perform at least one mathematical operation on selected pairs of data elements to produce an output of processed data elements. At least one intermediate register is coupled to the butterfly processor and configured to temporarily store the processed data. A feedback loop is coupled to the intermediate register and the butterfly processor, and where if enabled, is configured to transfer a first portion of processed data elements to the appropriate butterfly processor to perform additional mathematical operations and where if disabled, is configured to transfer a second portion of processed data elements to at least one holding register.

Apparatus and method for decoding and computing a discrete cosine transform using a butterfly processor

Apparatus, systems and methods for using the selection of an appropriate parameter at decompression are disclosed. In particular, when adaptive block size discrete cosine transform compression is used to compress data, different combinations of sub-blocks can be generated. To decompress the different combinations of sub-blocks, the appropriate parameter is selected based on block size assignment information and the address of data in the data block.

Systems and methods using parameter selection in data compression and decompression

Apparatus and method for selecting an appropriate parameter at decompression are disclosed. In particular, when adaptive block size discrete cosine transform compression is used to compress data, different combinations of sub-blocks can be generated. To decompress the different combinations of sub-blocks, the appropriate parameter is selected based on block size assignment information and the address of data in the data block.

Parameter selection in data compression and decompression

In a system having a plurality of processorsto M and each processor has corresponding output registersto N an apparatus and method to transfer is claimed. The data comprises a current group of data and a next group of data. Each group of data comprises a plurality of portions of data. The current group of data from each processorto M is transferred to its corresponding output registerto N. Each processor then receives and processes the next group of data. Simultaneously, the portion of data from output register N to output register N-is transferred. Similarly, each portion of data from output register N-is transferred to output register N-and so on. The portion of data from registeris transferred to a frame buffer.

Apparatus and method for consolidating output data from a plurality of processors

An apparatus to determine a transform of a block of encoded data the block of encoded data comprising a plurality of data elements. An input register is configured to receive a predetermined quantity of data elements. At least one butterfly processor is coupled to the input register and is configured to perform at least one mathematical operation on selected pairs of data elements to produce an output of processed data elements. At least one intermediate register is coupled to the butterfly processor and configured to temporarily store the processed data. A feedback loop is coupled to the intermediate register and the butterfly processor, and where if enabled, is configured to transfer a first portion of processed data elements to the appropriate butterfly processor to perform additional mathematical operations and where if disabled, is configured to transfer a second portion of processed data elements to at least one holding register.

Apparatus and method for encoding and computing a discrete cosine transform using a butterfly processor

A variable rate receiving system where a packet of variable rate data is reassembled on a traffic channel if the capacity of the traffic channel is greater than or equal to the data rate of the packet. When the rate of the packet of variable rate data exceeds the capacity of the traffic channel, the packet is received on a traffic channel and at least one overflow channel. Also described is a transmission system for transmitting the data on the traffic channel and at least one additional overflow channel.

A variable rate transmission system where a packet of variable is transmitted on a traffic channel if the capacity of the traffic channel is greater than or equal to the data rate of the packet. When the rate of the packet of variable rate data exceeds the capacity of the traffic channel, the packet is transmitted on a traffic channel and at least one overflow channel. Also described is a receiving system for receiving and reassembling the data transmitted on the traffic channel and at least one additional overflow channels.

Growing community of inventors

Carlsbad, CA, United States of America

Judith LaRocca