Texas Instruments Corporation

Juanita G Miller

Arthur M Wilson

Mark A Kressley

James M Drumm

Dean L Frew

Philip E Hecker, Jr

Randall E Johnson

Susan V Bagen

David C Hall

Richard A Elder

Rick Elder

John E Hanicak

A method for spin coating high viscosity materials. Two dispense steps are used. The first dispense step dispenses a small amount ( ) of high viscosity material at the center of the wafer ( ). A high-speed wafer rotation spreads the material to form a thin layer ( ) to prime the surface of the wafer ( ) and lower the surface tension without regard to uniformity. A second dispense step occurs at lower RPM and coats ( ) the wafer ( ) more uniformly.

Method for spin coating high viscosity materials on silicon wafers

A method of making a microelectronic circuit and the connection pattern therefor including the steps of providing a substrate (3), preferably silicon and preferably including a layer of nickel (38) under a layer of gold (36) thereon. Regions are formed on the substrate for connection of electrical components to the substrate using a first metallurgy, preferably gold and a pattern of bumps (5, 7) is formed of a second metallurgy different from the first metallurgy, preferably lead/tin solder. An interconnection pattern is formed on the substrate contacting at least one bump and at least one pad. The pattern of solder bumps is formed by providing a coupon (31) and patterning the bumps on the coupon and applied to the substrate while attached to the coupon, then heated to cause flow of the bumps onto the substrate. The coupon is then removed from the bumps with the bumps remaining on the substrate. Electrical components are applied to the region of first metallurgy and electrically bonded by wire bonding or Tape Automated Bonding techniques. Electrical components are applied to the region of the second metallurgy and electrically bonded by flip-chip technique.

Solder bump transfer for microelectronics packaging and assembly

The multi-chip circuit module of the invention comprises a plurality of circuit chips assembled in a laminated stack. Each chip includes a plurality of layers of thin film interconnect patterns in the normal configuration, except for the final layer or layers, which comprise a reroute pattern that locates all circuit input and output pads along a single edge of each chip. The relocated pads are provided with contact bumps to facilitate the addition of a bonded lead to each I/O pad extending therefrom to a point beyond the edge of each chip. Thus, upon lamination the protruding tips form an array of leads on a single lateral face of the laminated chip stack.

Three dimensional assembly of integrated circuit chips

A flexible polyimide film is used to support an array of precisely located contact bumps which are used to probe die on a wafer of semiconductor circuits, or an unmounted integrated circuit die, several integrated circuits, or hybrid devices. By utilizing a standard I/O contact pattern for the flexible film and fabricating the membrane assembly of interconnects on an aluminum substrate, it is possible to produce a more reliable probe card, while reducing the fabrication time and costs for the probe card. The polyimide film must be selected to have a CTE of 3 to 5, which is only about 1/5 to 1/7 as great as the CTE of the aluminum substrate on which the film is formed. This produces a critical degree of compressive stress in the polyimide film, and a resulting 'bow' of the film when the central area of the aluminum is etched away.

Method for fabrication of probe card for testing of semiconductor devices

Growing community of inventors

Richardson, TX, United States of America

Juanita G Miller