Toshiba Memory Corporation

Juan Shi

Tokumasa Hara

Hironori Uchikawa

Osamu Torii

Akira Yamaga

Kejen Lin

Keiri Nakanishi

Sho Kodama

Shigefumi Irieda

Kiichi Tachi

Susumu Tamon

According to one embodiment, a controller writes either processed data or preprocessing data and flags into each page included in m pages. The processed data is data after first data translation of write data to be written into a relevant page. The preprocessing data is data before the first data translation of the write data to be written into the relevant page. Each of the flag at least represents whether or not the first data translation is performed for write data to be written into the relevant page.

Memory system

According to one embodiment, a controller writes first processed data acquired by a first process into a nonvolatile memory during a first period. The controller writes second processed data acquired by a second process into the nonvolatile memory during a second period. The first process is for the purpose of improving the endurance of memory cells. The second process is for the purpose of decreasing inter-cell interferences between adjacent cells.

Write data optimization methods for non-volatile semiconductor memory devices

According to one embodiment, a memory system includes a non-volatile memory, a memory interface that performs programming and reading out with respect to the non -volatile memory, a code processor that generates a code word by encoding; and a controller that sets a threshold -voltage read level for determining whether a value of each bit in a received word read out from the non-volatile memory is '0' or '1'. A difference between the number of bits which have value equals &#x201c;0&#x201d; and the number of bits which have value equals &#x201c;1&#x201d; in the code word depends on a code rate of the encoding. The controller obtains the threshold-voltage read level based on the code rate.

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Yokohama, Japan

Juan Shi