Intel Corporation

Juan P Soto

Behrooz Z Mehr

Kevin M Lenio

Larry E Mosley

Nicholas Holmberg

Nick Holmberg

A parallel-plate capacitor structure includes a capacitor electrode including a first resistance and an electrode tab appended to the capacitor electrode and including a second resistance. The second equivalent series resistance is greater than the first equivalent series resistance. A process of assembling a parallel-plate capacitor package is also disclosed. A computing system is also disclosed that includes the parallel-plate capacitor package.

Controlled-resistance capacitors, and methods of assembling same

A carrier tape for a tape and reel machine includes at least one edge having a plurality of sprocket openings therein. The carrier tape also includes a first row of aperture cavities and a second row of aperture cavities. Electrical components are contained in the first and second row of aperture cavities. In some embodiments, the electrical components carried are the same, and in other embodiments, the electrical components carried in the first row differ from the electrical components carried in the second row.

Multi-row passive component carrier tape

A method and apparatus is provided that pertains to a low inductance capacitor. The capacitor has a first surface electrically interconnected to a plurality of conductive electrodes and one or more second surfaces electrically interconnected to a plurality of electrodes interposed between the electrodes electrically interconnected to the first conductive surface. A dielectric layer separates the layered plurality of electrodes. The one or more second conductive surfaces are positioned within the body of the layered electrodes, such that the distance between the terminations of the first conductive surface and the one or more second conductive surfaces is shortened to lower inductance.

Growing community of inventors

Chandler, AZ, United States of America

Juan P Soto