Hewlett-packard Development Company, L.p.

Juan Luis López Rodriguez

Xavier Soler Pedemonte

Javier González Bruno

Jesús Garcia Maza

David Soriano Fosas

Marc Bautista Palacios

Marina Ferran Farrés

Sergio Alejandro López Ramos

Electrical resistor heating with an electrical resistor heating circuitry which includes an AC power source of at least one phase, a plurality of heating resistors provided in a spatial arrangement, and switches to connect the AC power source with the heating resistors generating ON and OFF power states. Power scheduling is provided to adjust the power fed from the AC power source to the heating resistors at a desired partial-power level by ON/OFF switching a number of switches, wherein the power scheduling causes at least some of the switches to switch between the ON and OFF states in a staggered manner so that energization of the partial-power level of different resistors takes place, at least partially, non-simultaneously.

Electrical resistor heating

A printhead control system comprises a voltage supply control module to selectively supply an operating voltage to a printhead, and the voltage supply control module is configured to receive a first and a second control voltages, and to disconnect the supply of operating voltage to the printhead at least when the first and second control voltages have the same logical level.

Printhead control systems and methods for controlling a printhead

According to one example, there is provided a monitoring module for determining the status of electrical components in an array of N electrical components. The monitoring module comprises a resistance measurer to measure the resistance across a pair of diagnostic terminals, a comparator to compare the measured resistance with a set of reference resistances, and a status module to determine the status of at least one electrical component in the array based on the comparison.

Monitoring module and method for determining the status of electrical components

A current mirror comprises first and second sets of transistors. each of the first and second sets is a matched set comprising a first transistor and a second transistor. For each set, the base of the first transistor is directly coupled to the base of the second transistor. For one of the first and second transistors of each set the base is directly coupled to the collector. The collectors of the first and second transistors of the first set are coupled, respectively, to the emitters of the first and second transistors of the second set in series. A current output of the current mirror is coupled between the collector of the second transistor of the first set and the emitter of the second transistor of the second set.

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Subirats, Spain

Juan Luis López Rodriguez