Samsung Electronics Co., Ltd.

Ju-Ri Lee

Dong-Suk Shin

Hyun-Jun Sim

Kook-tae Kim

Ho-Sung Son

Sung-Uk Jang

Yong-Suk Tak

Min-jae Kang

A dummy gate electrode layer and a dummy gate mask layer may be formed on a substrate. The dummy gate mask layer may be patterned to form a dummy gate mask so that a portion of the dummy gate electrode layer is exposed. Ions may be implanted into the exposed portion of the dummy gate electrode layer and a portion of the dummy gate electrode layer adjacent thereto by an angled ion implantation to form a growth blocking layer in the dummy gate electrode layer. The dummy gate electrode layer may be etched using the dummy gate mask as an etching mask to form a dummy gate electrode. A spacer may be formed on side surfaces of a dummy gate structure including the dummy gate electrode and the dummy gate mask. An SEG process may be performed to form an epitaxial layer.

Semiconductor devices and methods of manufacturing the same

A method of manufacturing an integrated circuit device and an integrated circuit device prepared according to the method, the method including forming a silicon oxycarbonitride (SiOCN) material layer on an active region of a substrate, the forming the SiOCN material layer including using a precursor that has a bond between a silicon (Si) atom and a carbon (C) atom; etching a portion of the active region to form a recess in the active region; baking a surface of the recess at about 700&#xb0; C. to about 800&#xb0; C. under a hydrogen (H) atmosphere, and exposing the SiOCN material layer to the atmosphere of the baking while performing the baking; and growing a semiconductor layer from the surface of the recess baked under the hydrogen atmosphere.

Method of manufacturing integrated circuit device

Growing community of inventors

Yongin-si, South Korea

Ju-Ri Lee