Leadtrend Technology Corporation

Ju-Lin Chia

Yi-Shan Chu

Da-Chun Wei

A phase recovery circuit for avoiding noise interfering with the clock signal generated from an oscillator is disclosed. The phase recovery circuit includes a noise detector, a phase detector, and a phase locker. The noise detector detects noise and accordingly generates a noise detecting signal. The phase detector is triggered by the noise detecting signal for detecting the phase of the clock signal and accordingly generating a phase detecting signal. The phase locker locks the phase of the clock signal to a predetermined phase within a predetermined period after the occurrence of the noise detecting signal, and after the predetermined period, the phase locker releases the clock signal. In this way, the phase of the clock signal is not affected by noise.

Phase recovery circuit

A digital frequency jittering circuit for varying a switching frequency of a power supply is disclosed. The digital frequency jittering circuit includes a random data generator, an analog to digital functional module, and a digital to analog functional module. The random data generator has an oscillator for generating an oscillating signal having the switching frequency; a delay module for delaying the oscillating signal by first and second delay amounts to generate first and second delayed signals, wherein the first delay amount is not equal to the second delay amount; and a phase error detecting module for detecting an phase error between the first and the second delayed signals to generate a random data. The analog to digital functional module converts the random data into a digital random value. The digital to analog functional module varies the switching frequency of the oscillating signal according to the digital random value.

Digital frequency jittering apparatus with random data generator and method thereof

A dual loop voltage regulation circuit of power supply chip is provided, comprising a capacitor for providing a voltage signal, a comparator for comparing a first reference voltage signal and the voltage signal to output forward or backward trigger signal, a first switch triggered by a forward trigger signal, a second switch triggered by a backward trigger signal, a first operational amplifier generating a first drive signal while the first and second switches are on, a first transistor switch triggered to be on by a first drive signal to provide a current source loop, a third switch triggered by a forward trigger signal, a fourth switch triggered by a backward trigger signal, a second operational amplifier generating a second drive signal while the third and fourth switches are on, and a second transistor switch triggered to be on by a second drive signal to provide a current sink loop.

Dual loop voltage regulation circuit of power supply chip

A protection circuit of the memory module and method thereof are provided. The protection circuit includes: a first voltage comparing unit, which compares a reference voltage signal with a voltage level signal to output a first driving signal; a transistor switch, which is connected among the output terminal of the first voltage comparing unit and the input terminal of the second voltage comparing unit and a power end, wherein the voltage level signal and the threshold voltage signal is compared by the second voltage comparing unit so as to output a second driving signal to a logical algorithm unit, and a logical algorithm is conducted between the second driving signal and system enable signal to output a third driving signal; and a soft start enable unit for receiving the third driving signal so as to enable a soft start process.

Growing community of inventors

Hsin-Chu, Taiwan

Ju-Lin Chia