Samsung Electronics Co., Ltd.

Ju Hyun Ko

Jin Young Jeong

Seok Yong Hong

Ji Woon Jung

Dong Jae Han

Jin Woo Kim

Jun Ho Song

Young Tae Jang

Jong Seon Kim

Kyu Ik Cho

Won Joon Hong

Min Woo Son

Kwang June Sohn

Kyu Lk Cho

Yong Joo Song

An image sensor is provided. The image sensor includes a pixel array including first and second pixels, the first and second pixels receiving the same transfer gate signal and outputting first and second signal voltages, respectively, a transfer gate driver receiving first and second voltages and generating the transfer gate signal, the transfer gate signal having the first voltage as its maximum voltage and having the second voltage as its minimum voltage and a compensation module detecting a variation in the second voltage, generating a compensation voltage based on the variation in the second voltage, and performing a compensation operation.

Image sensor

A buffer amplifier circuit includes a buffer amplifier including a first differential amplifier having a first active load and a second differential amplifier having a second active load and a feedback circuit configured to feed an output signal of an output terminal of the buffer amplifier back to one of the first and second active loads using differential switch signals and an input signal of the buffer amplifier to enhance a slew rate of the output signal.

Buffer amplifier circuit for enhancing the slew rate of an output signal and devices including the same

An image sensor includes a pixel array, a column signal processor, and a column mismatch compensator. The pixel array outputs a pixel signal from each column line during a pixel measuring time, and outputs a reference signal during a reference measuring time. The column signal processor performs correlated double sampling (CDS) on the reference signal to generate a reference CDS signal, and performs CDS on the pixel signal to generate a pixel CDS signal. The column mismatch compensator compensates the pixel CDS signal based on the reference CDS signal.

Image sensor for compensating column mismatch and method of processing image using the same

An integrated circuit may include an operation amplifier, a first capacitor, a plurality of second capacitors, and/or a switching circuit. The operational amplifier may have a first input terminal, a second input terminal, and/or an output terminal. The first capacitor may have a first terminal and a second terminal. The second terminal of the first capacitor may be connected to the first input terminal of the operational amplifier. The plurality of second capacitors may each have a first terminal and a second terminal. The second terminal of each of the second capacitors may be connected to the second input terminal of the operational amplifier. The switching circuit may include a plurality of switches configured to switch in response to a plurality of switching signals. The switching circuit may be configured to transmit a reference voltage to the first terminal of the first capacitor and the first terminals of the second capacitors and/or connect the first input terminal of the operational amplifier to the output terminal of the operational amplifier during a first period. The switching circuit may be configured to isolate the first terminal of the first capacitor from the reference voltage, transmit a voltage selected from at least two selection voltages to the first terminals of the second capacitors, and/or connect the first terminal of the first capacitor to the output terminal of the operational amplifier during a second period.

Digital-to-analog converter and method thereof

A digital to analog converter includes first and second capacitors, an operational amplifier and a switching circuit. The operational amplifier includes first and second input terminals and an output terminal, the second input terminal receiving a reference voltage. The switching circuit includes multiple switches which switch in response to corresponding switching signals. The switching circuit connects the second capacitor between the output terminal and the first input terminal of the operational amplifier, while respectively sending first and second voltages to first and second terminals of the first capacitor during a first period. The switching circuit also connects the first capacitor between the output terminal and the first input terminal of the operational amplifier, while respectively sending third and fourth voltages to first and second terminals of the second capacitor during a second period consecutively following the first period.

Digital to analog converter and method for digital to analog conversion

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Yongin-si, South Korea

Ju Hyun Ko