Skhynix Inc.

Ju Heon Yang

Ho Young Son

Sung Kyu Kim

A semiconductor chip includes a body portion with a front surface and a rear surface; a through electrode penetrating the body portion; a wiring portion that is disposed over the front surface of the body portion; a rear connection electrode that is disposed over the rear surface of the body portion; and a front connection electrode that is disposed over the wiring portion, wherein the rear connection electrode includes a power rear connection electrode that is simultaneously connected to two or more power through electrodes, and wherein a width of the power rear connection electrode is greater than a width of the front connection electrode.

Semiconductor chip including through electrode, and semiconductor package including the same

A semiconductor device may include a substrate including a first surface and a second surface, a through electrode penetrating the substrate to include a protrusion that protrudes from the second surface of the substrate, and a front side bump electrically coupled to the through electrode and disposed on the first surface of the substrate. The semiconductor device may include a first passivation pattern disposed on the first surface of the substrate to substantially surround a sidewall of the front side bump and may be formed to include an uneven surface, and a second passivation pattern disposed on the second surface of the substrate to include an uneven surface. The protrusion of the through electrode may penetrate the second passivation pattern to protrude from the uneven surface of the second passivation pattern.

Semiconductor devices having through electrodes, semiconductor packages including the same, electronic systems including the same, and methods of manufacturing the same

A semiconductor chip includes a semiconductor substrate with a top surface and a bottom surface. An active layer may be formed on the top surface of the semiconductor substrate and may comprise one or more signal pads and one or more chip selection pads on an upper surface of the active layer. First and second through electrodes may be formed to pass through the semiconductor substrate and the active layer, with the first through electrodes being electrically connected with the signal pads and the second through electrodes being electrically connected with the chip selection pads. A side electrode may be formed on a side surface of the semiconductor chip in such a way as to be connected with a second through electrode.

Growing community of inventors

Seoul, South Korea

Ju Heon Yang