National Taiwan University

Jr-I Lee

Yen-Lin Huang

Pang-Ning Chen

Chia-Jung Chang

Yen-Tso Chen

Pen-Jui Peng

Ke-Chung Wu

A radio frequency transmitting device includes a frequency multiplier circuit, a mixer circuit, a power splitter, a plurality of phase shifting circuits, a plurality of amplifiers, and a plurality of antennas. The frequency multiplier circuit is configured to amplify a fundamental signal to generate a harmonic signal. The mixer circuit is configured to generate a RF signal based on an input signal and the harmonic signal. The power splitter is configured to generate a plurality of sub-RF signals. The phase shifting circuits are configured to shift the phase of the sub-RF signals. The amplifiers are configured to amplify the power of the sub-RF signals. The antennas are configured to transmit the sub-RF signals. Furthermore, a radio frequency receiving device is also disclosed herein.

Radio frequency transmitting device and radio frequency receiving device

A differential radio frequency signal transmitter is provided. The differential radio frequency signal transmitter includes an oscillator, a modulator and an amplifier module. The oscillator generates a pair of differential oscillation signals. The modulator generates a pair of differential modulated signals according to an input signal and the pair of differential oscillation signals. The input signal is a digital signal. When the input signal is at a first state, the modulator outputs the pair of differential oscillation signals as the pair of differential modulated signals, and when the input signal is at a second state, the modulator outputs a constant voltage signal as the pair of differential modulated signals. The amplifier module receives and amplifies the pair of differential modulated signals and generates a pair of differential radio frequency signals, accordingly.

Wireless radio frequency signal transceiving system

A clock and data recovery (CDR) circuit is provided. The CDR circuit receives a data signal and generates a clock signal. The CDR circuit comprises an oscillator, a phase detector, and a first voltage-to-current (V-to-I) converter. The oscillator generates the clock signal according to an oscillation voltage. The phase detector receives the data signal. The phase detector comprises a mixer for detecting a phase difference between the data clock and the clock signal and generating a phase detection signal which represents the phase difference. The first V-to-I converter receives the phase detection signal and generates a first current signal according to a voltage level of the phase detection signal to vary the oscillation voltage.

Growing community of inventors

Taipei, Taiwan

Jr-I Lee