Sciosense B.v.

Ams Ag

Jörg Siegert

Martin Schrems

Willem Frederik Adrianus Besling

Remco Henricus Wilhelmus Pijnenburg

Alessandro Faes

Bernhard Löffler

Kailash Vijayakumar

Franz Schrank

Jochen Kraft

Olaf Wunnicke

Casper Van Der Avoort

Hubert Enichlmair

Jordi Teva

Coenraad Cornelis Tak

Thomas Bodner

Bernhard Stering

Georg Parteder

Günther Koppitsch

Stefan Jessenig

Karl Rohracher

Gregor Toschkoff

Ewald Stückler

Sophie Guillemin

Karl Tuttner

Miklos Labodi

Bernhard LÖFFLER

Cathal Cassidy

Jens Hofrichter

Helene Richter

In an embodiment a method includes providing a semiconductor body, forming a sacrificial layer above a surface of the semiconductor body, applying a diaphragm on the sacrificial layer and removing the sacrificial layer by introducing an etchant into openings of the diaphragm, wherein applying the diaphragm comprises applying a first layer, reducing a roughness of a surface of the first layer facing away from the semiconductor body thereby providing a processed surface, and patterning and structuring the first layer to form the openings.

Method of manufacturing a semiconductor transducer device with multilayer diaphragm and semiconductor transducer device with multilayer diaphragm

In an embodiment a semiconductor transducer device includes a semiconductor body and a diaphragm having a first layer and a second layer, wherein a main extension plane of the diaphragm is arranged parallel to a surface of the semiconductor body, wherein the diaphragm is suspended at a distance from the semiconductor body in a direction perpendicular to the main extension plane of the diaphragm, wherein the second layer comprises titanium and/or titanium nitride, wherein the first layer comprises a material that is resistant to an etchant comprising fluorine or a fluorine compound, and wherein the second layer is arranged between the semiconductor body and the first layer.

Semiconductor transducer device with multilayer diaphragm and method of manufacturing a semiconductor transducer device with multilayer diaphragm

A capacitive sensor is disclosed. In an embodiment a semiconductor device includes a die including a capacitive pressure sensor integrated on a CMOS circuit, wherein the capacitive pressure sensor includes a first electrode and a second electrode separated from one another by a cavity, the second electrode including a suspended tensile membrane, and wherein the first electrode is composed of one or more aluminum-free layers containing Ti.

Capacitive pressure with Ti electrode

In an embodiment, a method for manufacturing a micro-electro-mechanical systems (MEMS) transducer device includes providing a substrate body with a surface, depositing an etch-stop layer (ESL) on the surface, depositing a sacrificial layer on the ESL, depositing a diaphragm layer on the sacrificial layer and removing the sacrificial layer, wherein depositing the sacrificial layer includes depositing a first sub-layer of a first material and depositing a second sub-layer of a second material, and wherein the first material and the second material are different materials.

Method for manufacturing an integrated MEMS transducer device and integrated MEMS transducer device

Capacitive pressure sensors and other devices are disclosed. In an embodiment a semiconductor device includes a first electrode, a cavity over the first electrode and a second electrode including a suspended membrane over the cavity and electrically conductive anchor trenches laterally surrounding the cavity, wherein the anchor trenches include an inner anchor trench and an outer anchor trench, the outer anchor trench having rounded corners.

Capacitive pressure sensors and other devices having a suspended membrane and having rounded corners at an anchor edge

A semiconductor substrate () is provided with a structure () on an upper side (), and an additional substrate () provided for handling the semiconductor substrate is likewise structured on an upper side (). The structuring of the additional substrate takes place in at least partial correspondence with the structure of the semiconductor substrate. The structured upper sides of the semiconductor substrate and the additional substrate are positioned such that they face one another and are permanently connected to one another. Subsequently, the semiconductor substrate is thinned from the rear side (), and the additional substrate is removed at least to such a degree that the structure of the semiconductor substrate is exposed to the extent required for the further use.

Method for producing thin semiconductor components

Through the intermetal dielectric () and the semiconductor material of the substrate () a contact hole is formed, and a contact area of a connection metal plane () that faces the substrate is exposed in the contact hole. A metallization () is applied, which forms a connection contact () on the contact area, a through-contact () in the contact hole and a connection contact () on a contact area facing away from the substrate and/or on a vertical conductive connection () of the upper metal plane ().

Method for producing a semiconductor component with a through-contact and semiconductor component with through-contact

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Jörg Siegert