Alcatel N.v.

Jozef D Cannaerts

Peter P Reusens

A prior art digital Delta-Sigma converter is improved by including a second control loop with a second forward branch coupled between the first and second subtractor circuits and a third subtractor circuit coupled in series to the first integrator circuit and with a second feedback branch and a third subtractor circuit coupled to the output of said first integrator circuit. When the input signal is equal to zero the output signal of the first integrator circuit will rapidly change to zero because the second control loop applies an additional feedback signal to the third subtractor circuit and therefore also to the first integrator circuit. Because the output signal of the first integrator output circuit signal thus more rapidly varies to zero the same is true for the output signal of the second integrator circuit and therefore also for the converter output signal.

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Zaventem, Belgium

Jozef D Cannaerts