Cadence Design Systems, Inc.

Mentor Graphics Corporation

Joydeep Mitra

Juan Andres Torres Robles

John R Murphy

Luke Roberto

Taylor Elsom Hogan

Zachary Joseph Zumbo

Yuri Granik

Fedor G Pikus

Yuansheng Ma

Shang Li

Krasnova Polina Andreevna

The present disclosure relates to electronic circuit design, and more specifically, to training a neural network to serve as the reward function for optimization-based approaches to PCB design automation. Embodiments may include generating, using a processor, one or more placed designs using a genetic optimization methodology including a reward function and adjusting the one or more placed designs and the reward function during the generating. Embodiments may further include routing the one or more placed designs using an auto-router to assign a routability score label and training a neural network, using the one or more placed designs and the routability score label, to extract one or more intermediate features from the one or more placed designs. Embodiments may also include predicting a routability of the PCB design based upon, at least in part, the one or more intermediate features.

System, method, and computer program product for optimization-based printed circuit board design

The present disclosure relates to systems and methods for floorplanning using machine learning techniques. Embodiments may include receiving an electronic design and analyzing the electronic design using a reinforcement learning agent. Embodiments may further include recommending a first action wherein the first action includes at least one of a place agent action, a via agent action, or a route agent action. Embodiments may also include updating the electronic design based upon, at least in part, the first action to generate an updated electronic design. Embodiments may further include analyzing the updated electronic design using the reinforcement learning agent and recommending a second action wherein the second action includes at least one of a place agent action, a via agent action, or a route agent action. Embodiments may also include updating the updated electronic design based upon the second action to generate a second updated electronic design.

System and method for autonomous printed circuit board design using machine learning techniques

Aspects of the disclosed technology relate to techniques of combining directed self-assembly lithography and multiple patterning lithography. A coloring/grouping graph is first generated from layout data of a layout design. In the coloring/grouping graph, each coloring edge connects two nodes representing layout features that must be assigned to different masks, and each grouping/coloring edge connects two nodes representing layout features that should either be grouped together for DSA (directed-self-assembly) lithography or be assigned to different masks for multiple patterning lithography. The node groups formed by nodes connected with the coloring edges are colored. Colors of the nodes in one or more of node groups connected by the grouping/coloring edges are adjusted to convert one or more of the grouping/coloring edges into the coloring edges. After conversion, layout features represented by the nodes directly connected with the grouping/coloring edges are grouped together for generating guiding patterns.

Directed self-assembly-aware layout decomposition for multiple patterning

Aspects of the disclosed technology relate to techniques of generating guiding patterns for via-type feature groups. A guiding pattern is constructed based on seeding positions for a via-type feature group. The initial seeding positions are derived from targeted locations of via-type features in the via-type feature group. A potential energy function is then determined for the guiding pattern. Based on the potential energy function, simulated locations of the via-type features are computed. The seeding positions are compared with the targeted locations and may be adjusted based on differences between the simulated locations and the targeted locations. The above operations may be repeated until one of one or more termination conditions are met.

Generating guiding patterns for directed self-assembly

Growing community of inventors

Austin, TX, United States of America

Joydeep Mitra