Motorola Corporation

Freescale Semiconductor,inc.

Joyce K Yamamoto

Peter A Smith

Lawrence N Dworsky

Rong-Fong Huang

Emmett Howard

Craig S Amrine

Scott K Ageno

Chenggang Xie

Paige M Holm

Robert J Adler

Fred V Richard

Johann T Trujillo

Steven M Smith

Ross A Miesem

William G Skoda

Thomas Nilsson

Barbara Foley Barenburg

John E Mattson

Piyush Chaudhari

High quality epitaxial layers of monocrystalline materials () can be grown overlying monocrystalline substrates () such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer () comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer () of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy and epitaxial growth of single crystal silicon onto single crystal oxide materials. A microresonator device is formed overlying the monocrystalline substrate. Portions or an entirety of the microresonator device can also overly the accommodating buffer layer, or the monocrystalline material layer.

Structure and method for fabricating semiconductor microresonator devices

A field emissive display ( ) having an anode plate ( ) coupled to a cathode plate ( ) and a method for manufacturing the field emissive display ( ). A substrate ( ) of the cathode plate ( ) is manufactured or selected such that its coefficient of thermal expansion substantially matches that of the anode plate ( ), i.e., the coefficients of thermal expansion of the cathode plate ( ) and the anode plate ( ) are within ten percent of each other. The cathode plate ( ) is coupled to the anode plate ( ) by means of a frit structure ( ) whose coefficient of thermal expansion preferably substantially matches that of the cathode plate ( ) and the anode plate ( ). A control circuit can be mounted to the bottom surface of the field emissive display ( ).

Display and method of manufacture

A field emission display ( ) includes a cathode assembly ( ), an anode plate ( ), and a spacer ( ), which extends between the cathode assembly ( ) and the anode plate ( ). The spacer ( ) is comprised of a spacer material having a dielectric constant less than 100. A discharging period neutralizes positive electrical charge ( ) and renders the spacer ( ) invisible to a viewer of the field emission display ( ). Operating a field emission display ( ) to render a spacer ( ) invisible by providing a cathode, assembly ( ), an anode plate ( ), and a spacer ( ) comprised of a spacer material with a dielectric constant less than 100 and neutralizing positive electrical charge ( ) on spacer ( ).

Field emission display having an invisible spacer and method

A method for fabricating a field emission display ( ) includes the steps of providing a cathode plate ( ), providing an anode plate ( ), providing a spacer substrate ( ) made from a bulk spacer material ( ), cutting the spacer substrate ( ) to define a spacer ( ) having a surface ( ), passivating the surface ( ) of the spacer ( ) using the bulk spacer material ( ) to form a passivation layer, and disposing the spacer ( ) between the cathode plate ( ) and the anode plate ( ). A field emission display ( ) which includes a cathode plate ( ) having a plurality of electron emitters ( ), an anode plate ( ) opposing the cathode plate ( ), and a spacer ( ) extending between the cathode plate ( ) and anode plate ( ). The spacer ( ) has a passivation layer made from bulk spacer material ( ).

Method for fabricating a field emission display having a spacer with a passivation layer

A field emission display (,) includes a cathode plate (,) having a plurality of electron emitters (,), an anode plate (,) having a plurality of phosphors (,), and a spacer (,) having a rough surface (,). The roughness of rough surface (,) is selected to improve the charging and discharging characteristics of field emission display (,). Preferably, rough surface (,) is characterized by a peak-to-valley number within a range of 0.5-6 micrometers.

Field emission device having a spacer with an abraded surface

A field emission display (100) includes a cathode plate (102) having a plurality of electron emitters (124), an anode plate (104) opposing the cathode plate (102), and a bulk-resistive spacer (108) extending between the anode plate (104) and the cathode plate (102). The bulk-resistive spacer (108) is made from an electrically conductive material. The resistivity of the electrically conductive material is selected to remove impinging charges while preventing excessive power loss due to electrical current through the bulk-resistive spacer (108) from the anode plate (104) to the cathode plate (102).

Field emission device having a non-coated spacer

A method of producing a glass/metal package where a glass portion of the package is built up around a provided leadframe (10) using applications of solderable and glass pastes (20) which are subsequently fired (30). The glass paste and leadframe are chosen to have similar coefficients of expansion and the leadframe is pretreated to degasify and control oxidation of the metal to promote glass adhesion to the leadframe and prevent microcracking at a glass/metal interface. A seal ring is applied to the glass paste (40) and a lid is attached to the seal ring (50). The package is used to provide an sealed inert internal environment for sensitive electronic components such as a piezoelectric element. The package may be configured for leaded or surface mounting (60).

Glass/Metal package and method for producing the same

Multiphase ceramic materials for use in electronic applications such as patch antennas and multilayered ceramic devices may be fabricated by providing a novel combination of a glassy precursor material with operable amounts of a high purity cordierite material. The combined materials are sintered at appropriate temperatures, so that a non-glassy celsian type phase is formed. The materials of the instant invention, fabricated according to the method disclosed herein, demonstrate low dielectric constant (K) and low electrical loss (high Q) characteristics.

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Chandler, AZ, United States of America

Joyce K Yamamoto