Korea Advanced Institute of Science and Technology

Samsung Electronics Co., Ltd.

Skhynix Inc.

Joung-Ho Kim

Jun-Ho Lee

Jong-Hoon Kim

Minsu Kim

Tae-Ho Kwon

Mueng-Ryul Lee

Yong-Chan Kim

Yong-Don Kim

HyunWook Park

Myung-Hee Sung

Eung-Kyu Lee

Hyo-Sang Youn

Jin-Gook Kim

Boogyo Sim

Keeyoung Son

Jun-So Pak

Subin Kim

Shinyoung Park

Seungtaek Jeong

Gapyeol Park

Taein Shin

Chi-Uk Song

Seongguk Kim

Kyungjune Son

Youngwoo Kim

Jong-Wook Lim

A semiconductor package includes an interposer, an electronic device having a first side surface and a second side surface opposite to the first side surface, and including a plurality of memory dies stacked in a vertical direction, at least one first through pipe passing through the electronic device in the vertical direction adjacent to the first side surface, and moving a cooling liquid therein, and a plurality of thermal transmission lines extending in a horizontal direction inside the memory die, and extending in parallel from the first through pipe toward the second side surface.

Semiconductor package including embedded cooling structure

Disclosed are a three-phase wireless power transfer (WPT) system and three-phase wireless rechargeable unmanned aerial vehicle (UAV) system based on the same. Three power receiving coils, including resonators, are installed at the ends of three landing leg of the UAV. A three-phase power converter installed in the UAV receives the three-phase AC induction current induced in three power receiving coils, including resonators, converting the three-phase AC induction current into a DC current to be charged in a battery. A three-phase power wireless charging apparatus wirelessly transfers three-phase power from three power transmitting coils to the three power receiving coils of the UAV when the three landing legs land on three coil seating units provided on a charging platform. A magnetic flux leakage shielding coil may be provided to prevent magnetic flux leakage from approaching the UAV. The power transfer efficiency is excellent, and electromagnetic interference can be also reduced.

Three-phase wireless power transfer system and three-phase wireless chargeable unmanned aerial vehicle system based on the same

An unmanned aerial vehicle includes a body portion, a plurality of driving portions, a plurality of arms and first and second landing members. The body portion is formed at a center thereof, and the body portion includes an inner space defined by an upper plate, a lower plate and a plurality of supporting frames that connect the upper plate with the lower plate. The plurality of driving portions generate an impellent force for a flight. Each of the plurality of arms has one end connected to the body portion and the other end connected to one of the driving portions.

Unmanned aerial vehicles, charging systems for the same and methods of charging the same

A test device for testing a semiconductor device including a TSV may comprise a ring oscillator including a plurality of inverters, a switch selectively connecting an output node of an inverter of the plurality of inverters and the TSV, and a controller controlling the switch.

Test device, semiconductor device and testing method thereof

An address driving circuit includes a driving device unit and an energy recovery circuit. The driving device unit drives an address electrode to an address voltage or a reference voltage in response to driving control signals during an address period. The energy recovery circuit recovers a voltage charged to the address electrode in response to switching control signals such that a voltage of the address electrode transitions to the address voltage or the reference voltage via at least two intermediate voltages including first and second intermediate voltages during the address period.

Address driving circuit and plasma display device having the same

A semiconductor integrated circuit device may include: a substrate that includes a high-voltage device region and a low-voltage device region defined on the substrate; a first buried impurity layer formed in at least a portion of the high-voltage device region and coupled to a first voltage; a second buried impurity layer formed in at least a portion of the low-voltage device region and coupled to a second voltage less than the first voltage; and a well formed on the second buried impurity layer in the low-voltage device region and coupled to a third voltage less than the second voltage.

Semiconductor integrated circuit devices

A memory system includes a memory controller, a transmission bus, a power divider, a first memory chip, and a second memory chip. The transmission bus is coupled from the memory controller to a first node of the power divider for transferring signals. The first node of the power divider is coupled to a second node of the power divider via a first line, and the first node is also coupled to a third node of the power divider via a second line. The first memory chip is coupled to the second node via a first branch bus and the second memory chip is coupled to the third node via a second branch bus. Accordingly, reflected wave due to an impedance mismatching can be reduced to enhance the signal integrity.

Memory system including a power divider on a multi module memory bus

Growing community of inventors

Daejeon, South Korea

Joung-Ho Kim