Renesas Electronics Corporation

Jou Kudou

Masumi Kon

Hiroaki Shirai

Yoshiaki Ishizeki

To suppress detection accuracy of a measurement resistance from decreasing by an on-resistance of a selector switch. The selector switch is provided between a first node coupled to a first voltage through a reference resistance and multiple second nodes coupled to the second voltage through measurement resistances, and selects the second node to be coupled to the first node with the selector switch. A correction circuit generates a voltage obtained by adding the second voltage to a voltage between the second node and the first node as a correction voltage. A double integral ADC finds a first integral time elapsed when a difference voltage of the correction voltage to a voltage of the first node is integrated to the first voltage and a second integral time elapsed when the difference voltage of the first voltage to the voltage of the first node is integrated to the correction voltage.

Semiconductor device and electronic control device

According to the present invention, a small impedance detection circuit capable of accurately detecting the impedance of an object to be measured and an adjustment method of an impedance detection circuit can be provided. In the impedance detection circuit according to the present invention, an AC signal generator outputs an AC signal. A detection circuit, which is connected to a circuit to be measured, applies an AC signal to the circuit to be measured. Further, the detection circuit outputs a first signal corresponding to the composite impedance of the impedance of the circuit to be measured and a parasitic impedance. A correction circuit outputs a second signal in synchronization with the first signal. A subtraction circuit outputs a detection signal obtained by subtracting the second signal from the first signal.

Growing community of inventors

Kanagawa, Japan

Jou Kudou