Raytheon Company

Joshua J Cantrell

Eric J Beuville

John L Vampola

Micky R Harris

Bryan W Kean

Ali Enayat Zadeh

Matthew T Kuiken

Mark A Massie

Richard E Wahl

A system includes a focal plane array having multiple pixel circuit elements. Each pixel circuit element includes a photodetector configured to generate an electrical current based on received illumination. Each pixel circuit element also includes an integration capacitor configured to be charged by the electrical current and generate a capacitor voltage and to be discharged. Each pixel circuit element further includes a comparator configured to generate pulses in a digital output based on the capacitor voltage of the integration capacitor. In addition, each pixel circuit element includes a counter configured to (i) in a first configuration, count the pulses in the digital output of the comparator during a sampling period and (ii) in a second configuration, count pulses in a clock signal during a residue digitization period. A counted number of pulses in the clock signal is indicative of a residue stored on the integration capacitor at an end of the sampling period.

Digital pixel architecture supporting re-use of components for in-pixel analog-to-digital conversion of integration residue

An apparatus includes a bloom transistor frontend configured to receive an integrator output voltage and generate a comparator input voltage. The apparatus also includes a comparator configured to generate an output signal based on whether the comparator input voltage meets or exceeds a reference voltage. The bloom transistor frontend includes a first transistor configured to charge an input capacitance associated with the comparator in order to change the comparator input voltage. The bloom transistor frontend also includes a second transistor configured to discharge the input capacitance associated with the comparator in order to reset the comparator input voltage.

Digital pixel comparator with bloom transistor frontend

An analog counter circuit for use with a digital pixel includes: an input; an output; a first stage electrically coupled to the input that is charged to an initial charge voltage; a second stage that includes an accumulating charge storage device; and a charge transfer device between the first and second stages that includes a transfer voltage. The charge transfer device allows charge from the first stage to pass to the second stage and be accumulated on the accumulating charge storage device as long as a voltage at a node in the first stage is greater than the transfer voltage.

Single phase analog counter for a digital pixel

An image capturing device is provided, which includes a capacitive trans-impedance amplifier (CTIA) unit cell. The CTIA unit cell includes an image detector and a switching network. The image detector is configured to detect light having a first color and light having a second color different from the first color, and to generate a photocurrent in response to detecting the light. The switching network includes a CTIA switch, a CTIA low reset switch, and a CTIA high-reset biasing switch. The CTIA switch sets a first reset level of the CTIA unit cell to a first voltage in response invoking a first switching state of the CTIA low-reset switch and sets a second reset level of the CTIA to a second voltage greater than the first voltage level in response to invoking a second switching state of the CTIA low-reset switch.

Single-ended capacitive trans-impedance amplifier (CTIA) unit cell for two-color applications

A digital unit-cell included in an imaging system includes a light sensor configured to generate an electrical charge in response to receiving light, and an energy storage circuit configured to establish a first parasitic capacitance and second large capacitance to store the electrical charge. The digital unit-cell further includes a gain selection circuit and a dual-mode comparator. The gain selection circuit is configured operate in a first mode to invoke the first capacitance and a second mode to invoke the second capacitance. The dual-mode comparator is configured to operate in a first reset mode that generates a first reset signal having a first pulse duration and a second reset mode that generates a second reset signal having a second pulse duration that is a longer than the first pulse duration.

Pulse-frequency modulation (PFM) digital pixel unit-cell including dual-mode gain selection

An image detector includes an array of detector unit cells including a plurality of unit cells and a plurality of single slope analog to digital converters (SSADCs). Each of the plurality of SSADCs is coupled to an output of a different one of the unit cells. Each each of the plurality of SSADCs includes: a comparator having a positive input and a negative input and a comparator output, the comparator being contained in a first layer; and a counter coupled to the comparator output and contained in a second layer. The counter is electrically coupled to the comparator with a through a silicon via.

Massively parallel three dimensional per pixel single slope analog to digital converter

An integration capacitor network for connection to a photo-current source includes: an input; a first path connected between the input and a reset voltage, the first path including a first integration capacitor and a first cascode transistor, the first cascode transistor coupled between the input and the first integration capacitor; and a second path connected between the input and the reset voltage, the second path including a second integration capacitor and a second cascode transistor, the second cascode transistor coupled between the input and the second integration capacitor. Gates of the first and second cascode transistors are connected to a reference voltage and charge is accumulated on the first integration capacitor until a voltage on the first integration capacitor exceeds the reference voltage and then charge is accumulated on the second integration capacitor.

Growing community of inventors

Santa Barbara, CA, United States of America

Joshua J Cantrell