International Business Machines Corporation

Globalfoundries Inc.

Northrop Grumman Systems Corporation

Other

Adeia Semiconductor Bonding Technologies Inc.

Zeon Corporation

Jsr Corporation

Globalfoundries U.S. 2 LLC

Toshiba America Electronic Components, Inc.

Elpis Technologies Inc.

Glogalfoundries, Inc.

Northrop Grumnian Systems Corporation

Josephine B Chang

Jeffrey W Sleight

Michael A Guillorn

Isaac Lauer

Chung-Hsun Lin

Leland Chang

Paul S Chang

Xin Miao

Hendrik F Hamann

Amlan Majumdar

Sarunya Bangsaruntip

Gen Pei Lauer

Theodore Gerard Van Kessel

Siyuan Lu

Brian A Bryce

Steven John Koester

Adam M Pyzyna

Vijay Narayanan

Wilfried Haensch

Ramachandran Muralidhar

Eric Andrew Joseph

Hiroyuki Miyazoe

Marcelo A Kuroda

Bruce Bennett Doris

Stephen W Bedell

Fei Liu

Shreesh Narasimha

Hsinyu Tsai

Robert Samuel Howell

Guy M Cohen

Dechao Guo

Shu-Jen Han

Christian Lavoie

Matthew Warren Copel

Mark B Ketchen

Sebastian Ulrich Engelmann

Gerald Warren Gibson, Jr

Douglas T McClure, Iii

Tenko Yamashita

Karthik Balakrishnan

Cyril Cabral, Jr

Katherine Lynn Saenger

John Michael Cotte

Levente Klein

Chad Tyler Rigetti

George Andrew Keefe

Shalini Gupta

Edward J Nowak

Brent A Anderson

Takashi Ando

Theodorus E Standaert

Sivananda K Kanakasabapathy

Alfred Grill

Andres Bryant

Jay Michael Gambetta

Eugene John O'Sullivan

David William Abraham

Martin Michael Frank

Renee Tong Mo

Pranita Kulkarni

Jin Cai

Markus Brink

Nicholas C M Fuller

Brian L Ji

Xiaoyan Shao

Jun Song Wang

Martin Glodde

Mary Beth Rothwell

Lidija Sekaric

Satyavolu S Papa Rao

Eric Jonathan Stewart

Szu-Lin Cheng

Wilfried Ernst-August Haensch

Philip S Waggoner

Kangguo Cheng

Effendi Leobandung

Balasubramanian Pranatharthiharan

Praneet Adusumilli

Michael Patrick Chudzik

Supratik Guha

Zhen Zhang

Yves Corfield Martin

Masahiro Nakamura

Omer H Dokumaci

Talia S Gershon

Phaedon Avouris

Mahadevaiyer Krishnan

Alessandro Cesare Callegari

Michael F Lofaro

Katherina E Babich

Nicholas C Fuller

Michael Joseph Rooks

Wenjuan Zhu

Mickey H Yu

Tomohisa Konno

Tatsuya Yamanaka

Changhwan Choi

Matthew Russell King

Jason E Cummings

Mary Elizabeth Rothwell

A field effect transistor (FET) includes a substrate; a channel material located on the substrate, the channel material comprising one of graphene or a nanostructure; a gate located on a first portion of the channel material; and a contact aligned to the gate, the contact comprising one of a metal silicide, a metal carbide, and a metal, the contact being located over a source region and a drain region of the FET, the source region and the drain region comprising a second portion of the channel material.

Graphene/nanostructure FET with self-aligned contact and gate

A technique relates to a superconducting airbridge on a structure. A first ground plane, resonator, and second ground plane are formed on a substrate. A first lift-off pattern is formed of a first lift-off resist and a first photoresist. The first photoresist is deposited on the first lift-off resist. A superconducting sacrificial layer is deposited while using the first lift-off pattern. The first lift-off pattern is removed. A cross-over lift-off pattern is formed of a second lift-off resist and a second photoresist. The second photoresist is deposited on the second lift-off resist. A cross-over superconducting material is deposited to be formed as the superconducting airbridge while using the cross-over lift-off pattern. The cross-over lift-off pattern is removed. The superconducting airbridge is formed to connect the first and second ground planes by removing the superconducting sacrificial layer underneath the cross-over superconducting material. The superconducting airbridge crosses over the resonator.

Superconducting airbridge crossover using superconducting sacrificial material

A method for measuring pollution that includes providing a plurality of analyte sensors arranged in a grid over a sensing area, wherein the analyte sensors measure a pollutant, and positioning at least one current sensor in the sensing area. A pollution source is localized using a pollution source locator including a dispersion model and at least one hardware processor to interpolate a location of a pollution source from variations in current measured from the current sensors and measurements of pollutants from the analyte sensors.

Leveraging air/water current variability for sensor network verification and source localization

A technique relates to a trilayer Josephson junction structure. A dielectric layer is on a base electrode layer that is on a substrate. A counter electrode layer is on the dielectric layer. First and second counter electrodes are formed from the counter electrode layer. First and second dielectric layers are formed from the dielectric layer. First and second base electrodes are formed from base electrode layer. The first counter electrode, first dielectric layer, and first base electrode form a first stack. The second counter electrode, second dielectric layer, and second base electrode form a second stack. A shunting capacitor is between first and second base electrodes. An ILD layer is deposited on the substrate, the first and second counter electrodes, and the first and second base electrodes. A contact bridge connects the first and second counter electrodes. An air gap is formed underneath the contact bridge by removing ILD.

Trilayer Josephson junction structure with small air bridge and no interlevel dielectric for superconducting qubits

Field effect transistors and methods of forming the same include forming a stack of nanosheets of alternating layers of channel material and sacrificial material. A layer of sacrificial material forms a top layer of the stack. A dummy gate is formed over the stack. Stack material outside of a region covered by the dummy gate is removed. The sacrificial material is etched to form recesses in the sacrificial material layers. Spacers are formed in the recesses in the sacrificial material layers. At least one pair of spacers is formed in recesses above an uppermost layer of channel material. The dummy gates are etched away. The top layer of sacrificial material protects an uppermost layer of channel material from damage from the anisotropic etch. The sacrificial material is etched away to expose the layers of channel material. A gate stack is formed over, around, and between the layers of channel material.

Sacrificial layer for channel surface retention and inner spacer formation in stacked-channel FETS

Field effect transistors include a stack of nanowires of vertically arranged channel layers. A source and drain region is disposed at respective ends of the vertically arranged channel layers. A gate stack is formed over, around, and between the vertically arranged channel layers. Internal spacers are each formed between the gate stack and a respective source or drain region, with at least one pair of spacers being positioned above an uppermost channel layer.

Field effect transistor structures

A transistor is provided that comprises a source region overlying a base structure, a drain region overlying the base structure, and a block of semiconducting material overlying the base structure and being disposed between the source region and the drain region. The block of semiconducting material comprises a gate controlled region adjacent the source region, and a drain access region disposed between the gate controlled region and the drain region. The drain access region is formed of a plurality of semiconducting material ridges spaced apart from one another by non-channel trench openings, wherein at least a portion of the non-channel trench openings being filled with a doped material to provide a depletion region to improve breakdown voltage of the transistor.

Castellated superjunction transistors

Low power combustible gas sensors using a thermocouple design are provided. In one aspect, a combustible gas sensor includes: at least one first electrode; at least one second electrode formed from a dissimilar material from the first electrode; and a catalytic material at an active reaction junction between the first electrode and the second electrode, wherein the active reaction junction between the first electrode and the second electrode forms a thermocouple. A sensing device is including, e.g., multiple sensors, and a method for sensing combustible gas using the present sensors are also provided.

Low power combustible gas sensing

A gas sensor enclosure is provided. The gas sensor enclosure includes at least two coaxial shells, a gas sensor, a gas permeable membrane that exposes a portion of the gas sensor to gas exchange through one of the at least two coaxial shells and a screen. The screen encloses the at least two coaxial shells, the gas sensor and the gas permeable membrane.

Method of assembling a fugitive gas sensor enclosure

An enhancement-mode (e-mode) field effect transistor (FET) comprises a buffer layer, and a superlattice of conducting channels on the buffer layer and including a trench that cuts down through the superlattice into the buffer layer and separates the superlattice into a source-access region and a drain-access region, wherein the buffer layer forms a bottom of the trench. The e-mode FET includes a source and a drain adjacent to the source-access region and the drain-access region, respectively. The e-mode FET further includes a gate in the trench, such that a voltage above a threshold voltage of the e-mode FET applied to the gate induces a current channel in the buffer layer underneath the gate, which electrically connects the source-access region to the drain-access region to turn on the e-mode FET, and (ii) a voltage below the threshold voltage applied to the gate eliminates the current channel, which electrically disconnects the source-access region from the drain-access region to turn off the e-mode FET.

Enhancement mode saddle gate device

The present invention involves a multimodal sensor network for analyte detection. A first mode may involve low-power detection and a second mode may involve determining an analyte concentration and transmitting data associated with the analyte concentration. Specifically, the first mode may include establishing an analyte sensor network in a detection region, detecting an analyte in the detection region, and generating an electrical signal in response to the detecting the analyte. In response to the electrical signal exceeding a first threshold, the analyte detection system may operate in the second mode. The second mode may include requesting data associated with the one or more environmental conditions, determining an analyte concentration based on one or more environmental conditions transmitting data associated with the analyte concentration.

Multimodal analyte sensor network

A semiconductor device that includes a gate structure present on at least two suspended channel structures, and a composite spacer present on sidewalls of the gate structure. The composite spacer includes a cladding spacer present along a cap portion of the gate structure, and an inner spacer along the channel portion of the gate structure between adjacent channel semiconductor layers of at least two suspended channel structures. The inner spacer may be composed of an n-type or p-type doped glass.

Nanosheet and nanowire MOSFET with sharp source/drain junction

A vertical transistor is provided that includes a base structure and a superlattice structure overlying the base structure. The superlattice structure comprises a multichannel ridge having sidewalls. The multichannel ridge comprises a plurality of heterostructures that each form a channel of the multichannel ridge. The vertical transistor also includes a source region that overlies the base structure and is in contact with a first end of the superlattice structure, a floating drain that overlies the base structure and is in contact with a second end of the superlattice structure, and a drain. When the vertical transistor is in an 'ON' state, current flows from the source region through the channels of the multichannel ridge to the floating drain, which funnels the current to the drain through at least a portion of the base structure.

Vertical superlattice transistors

Heuristic-based techniques for gas leak source identification are provided. In one aspect, a method for identifying a location of a gas leak source includes: obtaining gas sensor data and wind data synchronously from a gas leak detection system having a network of interconnected motes comprising gas sensors and wind sensors, with the gas sensors arranged around possible gas leak sources in a given area of interest; identifying the location of the gas leak source using the gas sensor data and wind data; and determining a magnitude of gas leak from the gas leak source using the location of the gas leak source and a distance d between the location of the gas leak source and a select one of the gas sensors from which the gas sensor data was obtained. A gas leak detection system is also provided.

Heuristic based analytics for gas leak source identification

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Mahopac, NY, United States of America

Josephine B Chang