S&c Electric Company

S+c Electric Co.

Joseph W Ruta

Raymond P O'Leary

Michael G Ennis

Gregory C Mears

Richard P Mikosz

Ronald D Atanus

Raymond P O'leary

Todd W Klippel

Robert H Harner

Anthony F Segredo

Anthony Segredo

A control method and arrangement that monitors the condition and operating parameters of a power electronic system having power electronic devices and responds to various detected abnormalities to optimize operation of the power electronic system. The arrangement increases reliability of operation and optimizes the continuous supply of power to a load. The arrangement also includes the capability for diagnosing the parameters of the power electronic switches including drive current, drive voltage and operating temperature and for communicating the status information in a coordinated fashion.

Monitoring and control for power electronic system

A control arrangement and method is provided for detecting and responding to disturbances in electrical power systems. In a preferred arrangement, an integration is initiated that is based on a comparison of actual voltage of a source and a reference voltage. When the integration exceeds a predetermined value, the source is considered unreliable. Also in a preferred arrangement, a determination is made as to whether or not the disturbance is a downstream fault condition. For example, this is useful for applications where a transfer is made from a first source to a second source when predetermined disturbances are detected. In this manner, the transfer of the load to a second source is avoided which would continue the supply of the downstream fault. Additionally, the arrangement distinguishes between various degrees of disturbances to permit appropriate response based on the severity and type of disturbance. For example, a first immediate response, i.e. without intentional delay, is provided for more severe disturbances while a second delayed response is provided for less severe disturbances. The control arrangements transfers the load to an alternate source of power via the use of a high-speed source-transfer switching system that both avoids undesirable current flow between sources and minimizes undesirable transfer delays.

Arrangements to detect and respond to disturbances in electrical power systems

A control arrangement and method is provided that monitors the condition and operating parameters of a power electronic system having power electronic devices and responds to various detected abnormalities via appropriate action to optimize operation of the power electronic system. The arrangement increases reliability of operation and optimizes the continuous supply of power to a load. For example, the arrangement responds to an overheated power electronic switch by switching to an alternate power electronic switch, the overheated power electronic switch being made available as a temporary alternate path. The arrangement also includes the capability for diagnosing the power electronic switches by measuring the temperature of the power electronics switches and communicating the temperature information in a coordinated fashion with information regarding the operating status of the power electronics switches. Additionally, shorted power electronic switches are detected and appropriate action taken.

Control arrangement and method for power electronic system

A control arrangement and method is provided for electronic devices in which an electronic switch is maintained in a conducting state at all times other than when it is desired to render the electronic switch nonconducting. In a specific embodiment, a latched control signal is utilized which is changed by the receipt of a momentary signal to change the conducting state of the electronic switch. For example, according to one specific arrangement, the momentary signal is a secure, complex signal such that appropriate decoding and detection of the proper signal is required to change the conducting state of the electronic switch.

Control arrangement and method for electronic device

A control arrangement and method is provided for a power electronic system configured as a high-speed source-transfer switching systems (HSSTSS). The HSSTSS supplies an electrical load with alternating current from either a first source or a second source via respective first and second solid-state switches. The HSSTSS also includes a controller that samples the voltage waveforms of each of the first and second sources to detect when transfer between the sources is desirable, e.g. outages or voltage that is either too low or too high. The controller provides appropriate control signals to control operation of the solid-state switches and transfer supply of the load therebetween. The control arrangement avoids undesirable current flow between sources via a comparison of the voltages of the sources and current in the outgoing source, i.e. a polarity comparison to ensure that the current that will flow in the incoming source after transfer will be in opposition to the current flowing in the outgoing source before transfer. Thus, the transfer is delayed until the polarity comparison is satisfied. Additionally, the control arrangement minimizes undesirable transfer delays by establishing appropriate transfer conditions before issuing control signals to perform the transfer between sources, i.e. the transfer to turn on the incoming switch is delayed until after appropriate conditions establish that the outgoing source is off or can be effectively turned off. One form of appropriate conditions include the establishing of forced commutation conditions, preferably established by the incoming source voltage differential and the outgoing current being of the same polarity such that the voltage differential across the solid-state switch that is being turned on is sufficient to establish an initial change in current flow in opposition to the current flow in the solid-state switch to be turned off. The appropriate forced commutation is established by the voltage differential between the two sources being of sufficient magnitude to force the outgoing current to zero. Additionally, under certain conditions, the transfer is accomplished by awaiting the next current zero.

Control arrangement and method for high-speed source-transfer switching system

A control circuit is provided for a circuit interrupter that achieves an inverse-time characteristic for overcurrents that include instantaneous current levels higher than the interrupting capability of the circuit interrupter by synchronizing the operation of the circuit interrupter to ensure that circuit interruption takes place when the instantaneous current is within the interrupting capability of the circuit interrupter. This interrupting capability is similar to let-through current and is defined by the instantaneous magnitude of the current at the time of interruption or at a particular stage thereof. The control circuit is responsive to a time-current characteristic signal generator that provides a time-current signal in response to overcurrent after the passage of a time delay that is inversely related to the overcurrent. The control circuit utilizes the time-current signal to permit asynchronous operation of the circuit interrupter when the peak of the overcurrent is expected to be within the interrupting capabilities of the circuit interrupter and to control operation of the circuit interrupter in a manner synchronized with the overcurrent when the peak of the overcurrent is expected to exceed the interrupting capabilities of the circuit interrupter; the interruption in the synchronized manner being arranged to occur when the instantaneous current is within the interrupting capabilities of the circuit interrupter. If such overcurrents are predicted, the rate of change of the current and the instantaneous current being within a predetermined current range are utilized to synchronize operation of the circuit interrupter.

Control circuit for a circuit interrupter

An arrangement is provided for checking the validity of a sensed-current signal from a current-sensing device. The sensed-current signal represents the current in a line. An associated control circuit utilizes the sensed-current signal to indicate or predict the presence of undesired overcurrent conditions. When such conditions may be present, the sensed-current signal is checked to determine if the sensed-current signal is valid; i.e., whether the sensed-current signal accurately represents the current in the line. If the sensed-current signal is invalid, no trip signal is generated to interrupt the current. If the sensed-current signal is valid, the control circuit generates a trip signal to control operation of a circuit-interrupting device. In a particular arrangement, the load on the current-sensing device is changed to determine if the sensed-current signal is valid. If the sensed-current signal is valid, the level of the sensed-current signal remains in a valid range and the overcurrent-detection circuit issues the trip signal. If the sensed-current signal is invalid, the level of the sensed-current signal changes. In response, the control circuit does not issue the trip signal and is reset to an initialized mode to monitor for a valid overcurrent condition in response to the sensed-current signal. In a specific arrangement, the current-sensing device is an iron-core transformer which saturates at high current levels. Thus, if the transformer is saturated, the changing of the load on the transformer causes the level of the sensed-current signal to change and the trip signal is not issued.

Control circuit with validity-determining arrangement

An improved current-sensing arrangement and method are provided for supplying a signal that suitably represents line current over a wide current range. The current-sensing arrangement utilizes the signals from an iron core transformer and an air core transformer along with transition and scaling arrangements to provide the sensed current signal. The range of operation includes currents for which the iron core transformer exhibits saturation effects and currents for which the air core transformer does not contribute to the combined output signal. Additionally, the range of operation includes currents for which both the transformers contribute to the combined output signal. The output of the iron core transformer dominates the combined output signal for low currents, the output of the air core transformer dominates at high currents, and the transition from the domination of the iron core transformer to the air core transformer is gradual and occurs over a mid-range of current with contribution from both transformers. Accordingly, the combined output signal suitably represents the sensed current over a wide current range due to the contribution of the iron core transformer at low currents where no saturation effects are present and the contribution of the air core transformer at high currents with no saturation characteristic; a smooth transition being provided over a wide current range where both transformers contribute to the output and dominant contribution being provided by the transformer that is most accurate for the particular current.

Current-sensing arrangement utilizing two current-sensing signals

A trip signal generator comprises a circuit possessing an inverse time-current characteristics for producing a trip signal in response to the occurrence of overcurrent in an alternating current line. The trip signal is produced after the passage of some time period, which varies inversely with the difference between the absolute magnitude of the overcurrent and a threshold current. The circuit includes a portion which produces pulses at a rate proportional to the difference between the absolute magnitude of the overcurrent in the line and the threshold current. The circuit produces no pulses when the line current is less than or equal to the threshold current. The circuit includes a counter for counting the pulses and for producing the trip signal after the counting of a selected number of pulses. Another portion of the circuit enables the counter when overcurrent is in the line, but resets the counter and prevents its operation when the line current is less than or equal to the threshold current. The counter may include a plurality of selectable outputs, each corresponding to a different count, thereby permitting the length of the delay before the trip signal is generated to be varied by selecting a different one of the outputs. The circuit also may include one or more range selectors for automatically selecting among two or more counter outputs so as to produce the trip signal after the passage of different ranges of time period corresponding to different ranges of overcurrent.

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Arlington Heights, IL, United States of America

Joseph W Ruta