Advanced Micro Devices Corporation

Amd Inc.

Joseph W Peterson

Alan F Hendrickson

Dale E Gulick

John G Bartkowiak

Jacqueline E Mullins

Munehiro Yoshikawa

Shin Saito

James E Bowles

Hiroshi Matsubara

Dean Grumlose

Disclosed is a system for selectively enabling intermediate data processing of digital signals external to an integrated circuit (IC). The system comprises a transcoder, a codec connected to the transcoder, and a data processor located externally to the IC. In response to a strobe signal, a programmable switch diverts digital signals between the transcoder and the codec to a data path from the IC to the external processor. The digital signals are formatted within the IC for processing by the external processor. The externally processed digital signals are returned to the IC via a data path from the external processor. The digital signals are then reformatted within the IC for further processing by the IC.

Method and apparatus for external intermediate data processing

A communication circuit designed to be coupled to a radio receiver so as to receive a data signal and a receive signal strength indicator signal indicative of radio carrier strength therefrom, and further designed to be coupled to a controller, the communications circuit including a first, second, third, and fourth subcircuit. The first subcircuit receives the receive signal strength indicator from the receiver, determines radio carrier strength therefrom, and transfers the determined strength information to the controller. The second subcircuit receives the data signal from the receiver, determines if there are bit error within that signal, and transfers its determinations to the controller. The third subcircuit receives the data signal from the receiver, determines if there is jitter therein, and transfers its determinations to the controller. The fourth subcircuit is coupled to the second and third subcircuits to receive the output thereof, and is further coupled to the controller so as to receive output therefrom, the fourth subcircuit acting in response to the outputs to suppress signal noise.

Receiver quality measurement system for use in digital cordless

An in-circuit emulation capability mode incorporated in an integrated circuit. The in-circuit emulation capability mode disables the microcontroller of the integrated circuit and allows use of an external in-circuit emulator device to test and debug the integrated circuit without the necessity of physically replacing the microcontroller with in-circuit emulator hardware. The in-circuit emulation capability mode is suitable for any integrated circuit, however, it has been found that integrated circuits incorporating an in-circuit emulation capability mode are especially suitable for incorporation into the base and handset units of a cordless telephone that integrates the speech, control channels, and microcontroller portions of a modem, and the man-machine interface functions of a cordless telephone.

Integrated circuit, having microprocessor and telephony peripheral

A dual-mode baseband controller enables a single integrated circuit to support either In-Phase Quadrature (I-Q) or Non-Return to Zero (NRZ) radio-frequency transmitter architectures for use in second generation (CT2) cordless telephones. A radio frequency (RF) interface circuit controls output signals to support either the I-Q architecture or the NRZ architecture, depending on a MODE control bit received from a controlling integrated circuit. The RF interface circuit comprises an I-Q waveform generator, four multiplexers, two digital-to-analog converters, a buffer, interconnecting circuitry, and a timing controller operating under configurable software control.

Dual-mode baseband controller for radio-frequency interfaces relating to

The present invention disclosed an input/output data port circuit which connects a parallel data bus with an input serial data bus and an output serial data bus. The input/output data port is selectively operable in either a linear mode or a buffered mode. The input/output port is comprised of an interface register that is connected to a parallel data bus, a serial input bus and a serial output bus; a temporary register that is serially connected to the interface register, an outbound register that is connected in parallel to the temporary register and serially connected to a serial bus; and an inbound register that is connected in parallel to the temporary register and serially connected to a serial, bus.

Input/output data port with a parallel and serial interface

An integrated circuit especially suitable for incorporation into the base and handset units of a cordless telephone integrates the speech, control channels, and microcontroller portions of a modem, and the man-machine interface functions of a cordless telephone. The integrated circuit includes one or more of a number of aspects including an in-circuit emulation mechanism, a simplified keypad reporting mechanism, advanced noise suppression mechanisms, a low power emergency mode mechanism, a low cost serial control bus, a port pin interrupt mechanism, advanced power saving mechanisms, spectral measurement test mode means, a novel shut down mechanism, and a pull-up disabling mechanism.

Integrated circuit and cordless telephone using the integrated circuit

A clock generator and interrupt bypass circuit for use in reducing the power consumption of the electrical system in which they are implemented. The clock generator provides module clock signals for sequencing modules within the same electrical system, and is capable of generating those module clock signals when in an active mode, and of not generating those module clock signals when in a stand-by mode. The clock generator is further capable of providing a delay of a predetermined length from a request to enter shut-down mode to actual entry into shut-down mode, allowing time to prepare the electrical system for shut-down mode. The interrupt bypass circuit provides a means of leaving shut-down mode in the event that the relevant interrupt requests have been masked.

Clock generator capable of shut-down mode and clock generation method

A cordless telephone that may be fully powered by AC main power lines and only partially powered by telephone lines includes structure for producing dual tones, structure for producing dual-tone multifrequency tones from the dual tones, and structure for empowering each of the foregoing in the event of AC main power failure where the only power available passes through the telephone lines.

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Austin, TX, United States of America

Joseph W Peterson