Monolithic Power Systems, Inc.

Chengdu Monolithic Power Systems, Inc.

Joseph Urienza

Yiqing Jin

Rajesh Swaminathan

Peng Liu

An isolator system has a transmitter configured to generate a first pair of buffered differential signals base based on an input signal; an isolation barrier having an input side coupled to the transmitter to receive the first pair of buffered differential signals, and an output side configured to provide a second pair of differential signals; and a receiver coupled to the output side of isolation barrier to receive the second pair of differential signals, wherein the receiver provides an output signal based on restoring the second pair of differential signals into a third pair of differential signals, wherein the output signal is converted from the third pair of differential signals and is a duplicate of the input signal with inherited propagation delays.

Digital isolator and the method thereof

An offline power converter provides low EMI and quick reaction by slowly turning off a power switch at normal operation, and fast turning off the power switch when surge event happens.

Offline power converter and the method thereof

The present disclosure discloses a power converter providing a low output voltage from an offline AC. The power converter defines a voltage window for the input AC signal. Inside the voltage window, the rectified DC waveform is passed through to the output and the storage capacitor; outside the voltage window, the power converter is idle (or the output is blocked from input) and let the output storage capacitor alone supply the load.

Power converter with active bleeding and ramp up-down delay and the method thereof

A high voltage circuit layout structure has a P-type substrate; a first N-type tub, a second N-type tub, a third N-type tub, a first P-type tub with a first width and a second P-type tub with a second width formed on the P-type substrate; wherein the first P-type tub is formed between the first N-type tub and the second N-type tub; and the second P-type tub is formed between the second N-type tub and the third N-type tub.

High voltage circuit layout structure

Power converter with voltage window and the method thereof

A high voltage FET device provides drain voltage information with less overall silicon area consumption by forming a spiral resistance poly structure over a drift region of the high voltage FET device. The spiral resistance poly structure has an inner most end coupled to a drain region, and an outer most end coupled to a reference ground.

High voltage FET device with voltage sensing

The present disclosure discloses an EMI capacitor discharger with an active capacitor bleeder which monitors a utility AC source and detects the zero crossing of the utility AC source. When a prolonged period of no zero crossing occurred, the EMI capacitor discharger activates a discharging circuit.

EMI capacitor discharger and the method thereof

The embodiments of the present invention disclose a semiconductor device and a method for forming the semiconductor device. Wherein the semiconductor comprises: a first semiconductor layer, having a first conductivity type on a semiconductor substrate, a guard ring region, formed in the surface of the first semiconductor layer, having a second conductivity type; a Schottky diode metal contact, coupled to the first semiconductor layer, wherein the guard ring region is at periphery of the Schottky diode interface, and wherein the Schottky diode metal contact has no direct electrical connection with the guard ring region; and an electrical resistance module, coupled between the Schottky diode metal contact and the guard ring. Due to the ballasting effect from the electrical resistance module, the minority injection or the parasitic transistor action are alleviated. Thus, forward current capability is extended without introducing significant minority injection.

Growing community of inventors

Milpitas, CA, United States of America

Joseph Urienza