Ansaldo Sts Usa, Inc.

Joseph Reutzel

James Riling

James Brown

Kelly Berger

Anthony Pietro Mancini, Ii

Todd Anthony DeLong

Kevin Joseph Blostic

Michael Alexander

Bernard Clement

Adam Edward Szymkowiak

A railroad monitoring apparatus includes first and second diverse vital processing units, first and second current sensors configured to measure the current being provided to one or more signaling elements of an item of wayside signaling equipment, and means for measuring voltage levels being supplied to each of the signaling elements. The first processing unit receives a first current measurement from the first current sensor and the measured voltage levels, and the second vital processing unit receives a second current measurement from the second current sensor and the measured voltage levels. The vital processing units are each programmed to determine based on one or more of the first current measurement, the second current measurement and the measured voltage levels: (i) the state of the item of railroad wayside signaling equipment, (ii) failures within the item of railroad wayside signaling equipment, and (iii) failures within the monitoring apparatus itself.

Apparatus and method for vital signal state detection in overlay rail signal monitoring

A method of testing a target electronic device implemented in a configurable integrated circuit device includes receiving a baseline design for the target electronic device in a hardware description language, establishing a fault model for the particular configurable integrated circuit device, synthesizing the fault model in the hardware description language, embedding the synthesized fault model into the baseline design to create a modified baseline design in the hardware description language which enables one or more targeted signals to be selectively corrupted, creating a fault model enabled target device on the particular configurable integrated circuit device using the modified baseline design, performing a number of fault injection experiments on the fault model enabled target device, wherein each fault injection experiment includes causing at least one of the one or more targeted signals to be corrupted within the fault model enabled target device.

Method of analyzing the safety of a device employing on target hardware description language based fault injection

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Pittsburgh, PA, United States of America

Joseph Reutzel