Eastman-kodak Company

Omnivision Technologies, Inc.

Truesense Imaging, Inc.

Semiconductor Components Industries, LLC

Joseph R Summa

John Paul McCarten

Cristian A Tivarus

Herbert J Erhardt

Todd J Anderson

Robert Michael Guidash

Eric Gordon Stevens

Christopher Parks

Hung Q Doan

Robert P Fabinski

John Thomas Compton

David L Losee

Eric J Meisenzahl

James E Doran

Eric J Knappenberger

John P McCARTEN

Eric John Meisenzahl

John P Mccarten

Robert Pierre Fabinski

Cristian Alexandru Tivarus

Todd Jeffery Anderson

Christian Alexandru Tivarus

A method for producing a device in one or more layers of patternable material disposed over a substrate uses multiple exposure tools having different resolution limits and maximum expose field sizes. An abutting field pattern is exposed and stitched in one layer of patternable material using one exposure tool and a first mask. A periphery pattern is then exposed in the same layer or in a different layer of patternable material using a second exposure tool and a second mask. The maximum expose field of the first exposure tool is smaller than a size of the device while the maximum expose field of the second exposure tool is at least as large as, or larger, the size of the device so that the combination of the stitched abutting field pattern and the periphery pattern forms a complete pattern in the patternable material.

Stitching methods using multiple microlithographic expose tools

A back-illuminated image sensor includes a sensor layer disposed between an insulating layer and a circuit layer electrically connected to the sensor layer. An imaging area includes a plurality of photodetectors is formed in the sensor layer and a well that spans the imaging area. The well can be disposed between the backside of the sensor layer and the photodetectors, or the well can be a buried well formed adjacent to the backside of the sensor layer with a region including formed between the photodetectors and the buried well. One or more side wells can be formed laterally adjacent to each photodetector. The dopant in the well has a segregation coefficient that causes the dopant to accumulate on the sensor layer side of an interface between the sensor layer and the insulating layer.

Back-illuminated CMOS image sensors

An image sensor includes a first sensor layer having a first array of pixels and a second sensor layer having a second array of pixels. Each pixel of the first and second arrays has a photodetector for collecting charge in response to incident light, a charge-to-voltage conversion mechanism, and a transfer gate for selectively transferring charge from the photodetector to the charge-to-voltage mechanism. The first and second sensor layers each have a thicknesses to collect light with a first and second preselected ranges of wavelengths, respectively. A circuit layer is situated below the first sensor layer and has support circuitry for the pixels of the first and second sensor layers, and interlayer connectors are between the pixels of the first and second layers and the support circuitry.

Image sensor having multiple sensing layers

An image sensor includes an array of pixels comprising a plurality of kernels that repeat periodically and each kernel includes n photosensitive regions for collecting charge in response to light, n is equal to or greater than 2; and a transparent layer spanning the photosensitive regions having n optical paths, at least two of which are different, wherein each optical path directs light of a predetermined spectral band into specific photosensitive regions.

Image sensors having gratings for color separation

A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. One or more frontside regions of a second conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region of the second conductivity type is formed in the backside of the sensor layer. A plurality of frontside photodetectors of the first conductivity type is disposed in the sensor layer. A distinct plurality of backside photodetectors of the first conductivity type separate from the plurality of frontside photodetectors are formed in the sensor layer contiguous to portions of the region of the second conductivity type. A voltage terminal is disposed on the frontside of the sensor layer. One or more connecting regions of the second conductivity type are disposed in respective portions of the sensor layer between the voltage terminal and the backside region for electrically connecting the voltage terminal to the backside region.

Back-illuminated image sensors having both frontside and backside photodetectors

An image sensor includes a first sensor layer having a first array of pixels and a second sensor layer having a second array of pixels. Each of the pixels has an optical center. The first sensor layer is stacked over the second sensor layer such that the optical centers of the first array of pixels are offset from the optical centers of the second array to form a predetermined pattern.

A back-illuminated image sensor includes a sensor layer of a first conductivity type having a frontside and a backside opposite the frontside. An insulating layer is disposed over the backside. A circuit layer is formed adjacent to the frontside such that the sensor layer is positioned between the circuit layer and the insulating layer. One or more frontside regions of a second conductivity type are formed in at least a portion of the frontside of the sensor layer. A backside region of the second conductivity type is formed in the backside of the sensor layer. A plurality of frontside photodetectors of the first conductivity type is disposed in the sensor layer. A distinct plurality of backside photodetectors of the first conductivity type separate from the plurality of frontside photodetectors is formed in the sensor layer contiguous to portions of the backside region of the second conductivity type.

An image sensor includes (a) a first wafer having (i) a photosensitive area; (ii) a charge-to-voltage conversion region; (b) a second wafer having (i) a first amplifier that receives a signal from the charge-to-voltage conversion region; (c) an electrical interconnect connecting the charge-to-voltage conversion region to an input of the amplifier; (d) an electrically biased shield at least partially enclosing at least a portion of the electrical interconnect.

High gain read circuit for 3D integrated pixel

A vertically-integrated image sensor includes a sensor wafer connected to a support circuit wafer. Each pixel region on the sensor wafer includes a photodetector, a charge-to-voltage conversion mechanism, a transfer mechanism for transferring charge from the photodetector to the charge-to-voltage conversion mechanism, and a reset mechanism for discharging the charge-to-voltage conversion mechanism. The support circuit wafer includes an amplifier and other support circuitry for each pixel region on the sensor wafer. An inter-wafer connector directly connects each charge-to-voltage mechanism on the sensor wafer to a respective gate to an amplifier on the support circuit wafer.

Active pixel sensor having two wafers

A back-illuminated image sensor includes a sensor layer having a frontside and a backside opposite the frontside. An insulating layer is situated adjacent the backside and a circuit layer is adjacent the frontside. A plurality of photodetectors of a first type conductivity convert light incident on the backside into photo-generated charges. The photodetectors are disposed in the sensor layer adjacent the frontside. A region of a second type conductivity is formed in at least a portion of the sensor layer adjacent the frontside and is connected to a voltage terminal for biasing the second type conductivity region at a predetermined voltage. A well of the second type conductivity is formed in the sensor layer adjacent the backside. Trench isolations in the sensor layer start at the frontside and extend beyond the depletion region of the photodiodes.

Back illuminated sensor with low crosstalk

An image sensor includes at least first and second photo-sensitive regions; a color filter array having at least two different colors that selectively absorb specific bands of wavelengths, and the two colors respectively span portions of predetermined photo-sensitive regions; and wherein the two photo sensitive regions are doped so that electrons that are released at two different depths in the substrate are collected in two separate regions of the photo sensitive regions so that, when wavelengths of light pass through the color filter array, light is absorbed by the photo sensitive regions which photo sensitive regions consequently releases electrons at two different depths of the photo sensitive regions and are stored in first and second separate regions; at least two charge-coupled devices adjacent the first photo sensitive regions; and a first transfer gate associated with the first photo sensitive region that selectively passes charge at first and second levels which, when at the first level, causes the charge stored in the first region to be passed to one of its associated charge-coupled devices, and when the transfer gate is at the second level, charge stored in the second region is passed to one of the associated charge-coupled devices.

Interline CCD implementation of hybrid two color per pixel architecture

A method of forming a charge-coupled device including the steps of forming well or substrate of a first conductivity type; a buried channel of a second conductivity type; a plurality of first gate electrodes; partially coating the first gate electrodes with a mask substantially aligned to an edge of the first gate electrodes; implanting ions of the first conductivity type of sufficient energy to penetrate the first gates and into the buried channel; and a plurality of second gate electrodes covering regions each over the buried channel between the first gate electrodes.

CCD with improved charge transfer

A CMOS image sensor or other type of image sensor comprises a sensor wafer and an underlying circuit wafer. The sensor wafer comprises a plurality of photosensitive elements arranged in respective positions of a two-dimensional array of positions in which a subset of the array positions do not include photosensitive elements but instead include diffusion regions each of which is shared by two or more of the photosensitive elements. The sensor wafer is interconnected with the circuit wafer utilizing a plurality of inter-wafer interconnects coupled to respective ones of the shared diffusion regions in respective ones of the array positions that do not include photosensitive elements. The image sensor may be implemented in a digital camera or other type of image capture device.

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Hilton, NY, United States of America

Joseph R Summa