Applied Materials, Inc.

Palo Alto Research Center Inc.

Joseph R Johnson

Christopher Dennis Bencher

Thomas L Laidig

Joseph Michael Ranish

Philip Allan Kraus

Mehdi Vaez-Iravani

Roger Allan Quon

Kenichi Ohno

John Gerling

Rutger Meyer Timmerman Thijssen

Mehran Behdjat

Subhash Deshmukh

Raghav Sreenivasan

Michael Patrick Chudzik

Steven Verhaverbeke

Aaron Muir Hunter

Mark Joseph Saly

Klaus Florian Schuegraf

Robert Jan Visser

David A Markle

David Eric Schwartz

He Ren

Bhaskar Jyoti Bhuyan

Ankit Vora

Sriskantharajah Thirunavukarasu

Dirk De Bruyker

Matthew Dixon Eisaman

Sean Roark Garner

Oleg V Serebryanov

Wayne McMillan

Jingjing Liu

Mathew Abraham

William John Durand

Keenan Navarre Woods

Zohreh Hesabi

Ryan Scott Smith

Aneesh Nainani

Dave Markle

Ricardo Santos Roque

David Collins

George Odlum

Ang Li

Jean Marc Fan Chung Tsang Min Ching

An imaging system for capturing spatial-omic images of biological tissue samples may include an imaging chamber configured to secure a biological tissue sample placed in the imaging system; a Time Delay and Integration (TDI) imager comprising at least one scan line; a light source configured to illuminate an area on the biological tissue sample that is being captured by the TDI imager; and a controller configured to cause the TDI imager to scan the biological tissue sample using one or more TDI scans of the biological tissue sample.

Time delay integration acquisition for spatial genomics imaging

Examples described herein provide a system, a software application, and a method of a lithography process to write multiple tones in a single pass. A system includes a stage and a lithography system. The lithography system includes image projection systems, a controller, and memory. The controller is coupled to the memory, which stores instruction code. Execution of the instruction code by the controller causes the controller to control the stage and the image projection systems to iteratively expose a photoresist supported by the stage and to move the stage relative to the image projection systems a step distance between sequential pairs of the exposures. Each exposure includes using write beam(s) projected from the image projection systems. Each exposure is at a respective one of different dosage amounts. An accumulation of the different dosage amounts is a full tone dosage amount for the photoresist.

Multi-tone scheme for maskless lithography

Methods, systems and apparatus for decreasing total distortion of a maskless lithography process are disclosed. Some embodiments provide methods, systems and apparatus for decreasing total distortion without physical modification of the apparatus.

Decreasing distortion by modifying pixel spacing

Embodiments of the present disclosure provide nanopore devices, such as nanopore sensors and/or other nanofluidic devices. In one or more embodiments, a nanopore device contains a substrate, an optional lower protective oxide layer disposed on the substrate, a membrane disposed on the lower protective oxide layer, and an optional upper protective oxide layer disposed on the membrane. The membrane has a pore and contains silicon nitride. The silicon nitride has a nitrogen to silicon ratio of about 0.98 to about 1.02 and the membrane has an intrinsic stress value of about &#x2212;1,000 MPa to about 1,000 MPa. The nanopore device also contains a channel extending through at least the substrate, the lower protective oxide layer, the membrane, the upper protective oxide layer, and the upper protective silicon nitride layer.

Nanofluidic device with silicon nitride membrane

Methods for patterning a substrate are described. A substrate is scanned using a spatial light modulator with a plurality of exposures timed according to a non-crystalline shot pattern. Lithography systems for performing the substrate patterning method and non-transitory computer-readable medium for executing the patterning method are also described.

Method to achieve non-crystalline evenly distributed shot pattern for digital lithography

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays thereof. In one aspect, methods for manufacturing nanopores and arrays thereof exploit a physical seam. One or more etch pits are formed in a topside of a substrate and one or more trenches, which align with the one or more etch pits, are formed in a backside of the substrate. An opening is formed between the one or more etch pits and the one or more trenches. A dielectric material is then formed over the substrate to fill the opening. Contacts are then disposed on the topside and the backside of the substrate and a voltage is applied from the topside to the backside, or vice versa, through the dielectric material to form a nanopore. In another aspect, the nanopore is formed at or near the center of the opening at a seam, which is formed in the dielectric material.

Pore formation in a substrate

Embodiments of the present disclosure provide dual pore sensors and methods for producing these dual pore sensors. The method includes forming a film stack, where the film stack contains two silicon layers and two membrane layers, and then etching the film stack to produce a channel extending therethrough and having two reservoirs and two nanopores. The method also includes depositing a oxide layer on inner surfaces of the reservoirs and nanopores, depositing a dielectric layer on the oxide layer, and forming a metal contact extending through a portion of the stack. The method further includes etching the dielectric layers to form wells, etching the first silicon layer to reveal the protective oxide layer deposited on the inner surfaces of a reservoir, and etching the protective oxide layer deposited on the inner surfaces of the reservoirs and the nanopores.

Methods to fabricate dual pore devices

Nanopore flow cells and methods of manufacturing thereof are provided herein. In one embodiment a method of forming a flow cell includes forming a multi-layer stack on a first substrate, e.g., a monocrystalline silicon substrate, before transferring the multi-layer stack to a second substrate, e.g., a glass substrate. Here, the multi-layer stack features a membrane layer, having a first opening formed therethrough, where the membrane layer is disposed on the first substrate, and a material layer is disposed on the membrane layer. The method further includes patterning the second substrate to form a second opening therein and bonding the patterned surface of the second substrate to a surface of the multi-layer stack. The method further includes thinning the first substrate and thinning the second substrate. Here, the second substrate is thinned to where the second opening is disposed therethrough. The method further includes removing the thinned first substrate and at least portions of the material layer to expose opposite surfaces of the membrane layer.

Nanopore flow cells and methods of fabrication

Methods are provided for manufacturing well-controlled, solid-state nanopores and arrays of well-controlled, solid-state nanopores by a cyclic process including atomic layer deposition (ALD), or chemical vapor deposition (CVD), and etching. One or more features are formed in a thin film deposited on a topside of a substrate. A dielectric material is deposited over the substrate having the one or more features in the thin film. An etching process is then used to etch a portion of the dielectric material deposited over the substrate having the one or more features in the thin film. The dielectric material deposition and etching processes are optionally repeated to reduce the size of the features until a well-controlled nanopore is formed through the thin film on the substrate.

Method to reduce pore diameter using atomic layer deposition and etching

Embodiments of the present disclosure provide improved photolithography systems and methods using a solid state emitter device. The solid state emitter device includes an array of solid state emitters arranged in a plurality of horizontal rows and vertical columns. The variable intensity of each group of solid state emitters, for example an entire row or column of solid state emitters, is controllable for improved field brightness uniformity and stitching. Controlling the variable intensity includes, for example, varying the signal, such as voltage, that is applied to each of the rows of solid state emitters to attenuate the brightness from the middle of the array to the edges of the array to accommodate for overlapping exposures during photolithography processing.

Systems and methods of using solid state emitter arrays

Embodiments described herein provide a system, a software application, and a method of a lithography process, to write full tone portions and grey tone portions in a single pass. One embodiment includes a controller configured to provide mask pattern data to a lithography system. The controller is configured to divide a plurality of spatial light modulator pixels spatially by at least a grey tone group and a full tone group of spatial light modulator pixels. When divided by the controller, the grey tone group of spatial light modulator pixels is operable to project a first number of the multiplicity of shots to the plurality of full tone exposure polygons and the plurality of grey tone exposure polygons, and the full tone group of spatial light modulator pixels is operable to project a second number of the multiplicity of shots to the plurality of full tone exposure polygons.

Half tone scheme for maskless lithography

Embodiments of the present disclosure generally provide improved photolithography systems and methods using a digital micromirror device (DMD). The DMD comprises columns and rows of micromirrors disposed opposite a substrate. Light beams reflect off the micromirrors onto the substrate, resulting in a patterned substrate. Certain subsets of the columns and rows of micromirrors may be positioned to the 'off' position, such that they dump light, in order to correct for uniformity errors, i.e., features larger than desired, in the patterned substrate. Similarly, certain subsets of the columns and rows of micromirrors may be defaulted to the 'off' position and selectively allowed to return to their programmed position in order to correct for uniformity errors, i.e., features smaller than desired, in the patterned substrate.

Reserving spatial light modulator sections to address field non-uniformities

Methods of manufacturing well-controlled nanopores using directed self-assembly and methods of manufacturing free-standing membranes using selective etching are disclosed. In one aspect, one or more nanopores are formed by directed self-assembly with block co-polymers to shrink the critical dimension of a feature which is then transferred to a thin film. In another aspect, a method includes providing a substrate having a thin film over a highly etchable layer thereof, forming one or more nanopores through the thin film over the highly etchable layer, for example, by a pore diameter reduction process, and then selectively removing a portion of the highly etchable layer under the one or more nanopores to form a thin, free-standing membrane.

Method to create a free-standing membrane for biological applications

The embodiments described herein relate to a software application platform, which enhances image patterns resolution on a substrate. The application platform method includes running an algorithm to provide different target polygons for forming a pattern on a target. A minimum feature size which may be formed by a DMD is determined. For each target polygons smaller than the minimum feature size determining to line bias or shot bias the one or more target polygons to achieve an acceptable exposure contrast at the target polygon boundary. The one or more target polygons smaller than the minimum feature size are biased to form a digitized pattern on the substrate. Electromagnetic radiation is delivered to reflect off of a first mirror of the DMD when the centroid for the first mirror is within the one or more target polygons.

Method to enhance the resolution of maskless lithography while maintaining a high image contrast

Growing community of inventors

Redwood City, CA, United States of America

Joseph R Johnson