Lucent Technologies Inc.

At&t Bell Laboratories

Agere Systems Guardian Corp.

Agere Systems Inc.

Joseph Petrus Mannaerts

Minghwei Hong

Jueinai Raynien Kwo

Fan Ren

Ahmet Refik Kortan

James Robert Lothian

Alfred Yi Cho

Young-Kai Chen

George J Zydzik

Kent D Choquette

William Scott Hobson

Jenn-Ming Kuo

Ming-Chiang Wu

Robert S Freund

Yu-Chi Wang

Matthias Passlack

A novel method of forming a GaAs-based MOS structure comprises ion implantation after oxide formation, and subsequent slow heating and cooling, carried out such that essentially no interfacial defects that are detectable by high resolution transmission electron microscopy are formed. If the MOS structure is a MOS-FET then metal contacts are provided in conventional fashion. A post-metallization anneal can result in FETs that are substantially free of drain current/voltage hysteresis. MOS-FETs made according to the novel method can be produced with high yield and can have significantly increased lifetime, as compared to some prior art GaAs-based MOS-FETs.

Method of making an article comprising an oxide layer on a GaAs-based semiconductor body

We have found that a single crystal, single domain oxide layer of thickness less than 5 nm can be grown on a (100) oriented GaAs-based semiconductor substrate. Similar epitaxial oxide can be grown on GaN and GaN-based semiconductors. The oxide typically is a rare earth oxide of the Mn 0 3 structure (e.g., Gd O ). The oxide/semiconductor interface can be of high quality, with low interface state density, and the oxide layer can have low leakage current and high breakdown voltage. The low thickness and high dielectric constant of the oxide layer result in a MOS structure of high capacitance per unit area. Such a structure advantageously forms a GaAs-based MOS-FET.

Article comprising an oxide layer on a GaAs or GaN-based semiconductor body

A high dielectric rare earth oxide of the form Mn O (such as, for example, Gd O or Y O ) is grown on a clean silicon (100) substrate surface under an oxygen partial pressure less than or equal to 10 torr to form an acceptable gate oxide (in terms of dielectric constant (&isin;&tilde;18) and thickness) that eliminates the tunneling current present in ultra-thin conventional SiO dielectrics and avoids the formation of a native oxide layer at the interface between the silicon substrate and the dielectric. Epitaxial films can be grown on vicinal silicon substrates and amorphous films on regular silicon substrates to form the high dielectric gate oxide.

High dielectric constant gate oxides for silicon-based devices

A high quality oxide layer has been formed on a GaN surface by a method that involves preparation of the GaN such that the surface is essentially atomically clean and essentially atomically ordered, and that further involves exposing the surface to evaporant from a GGG (gallium gadolinium garnet) evaporation source. MOS structures comprising the GaN/oxide combination have shown low leakage current, as well as charge accumulation and depletion.

Article comprising an oxide layer on GAN

It has been found that a Ga-oxide-containing layer is substantially not etched in HF solution if the layer is a Ga-Gd-oxide with Gd:Ga atomic ratio of more than about 1:7.5, preferably more than 1:4 or even 1:2. This facilitates removal of a protective dielectric (typically SiO.sub.2) layer after an ohmic contact anneal, with the Ga-Gd-oxide gate oxide layer serving as etch stop and not being adversely affected by contact with the HF etchant. Gd-Ge-oxide also exhibits a composition-dependent etch rate in HCl:H.sub.2 O.

GaAs-based MOSFET, and method of making same

A high quality interface between a GaAs-based semiconductor and a Ga.sub.2 O.sub.3 dielectric an be formed if the semiconductor surface is caused to have less than 1% of a monolayer impurity coverage at completion of the first monolayer of the Ga.sub.2 O.sub.3 on the surface. This is achieved, for instance, by preparing the surface of a GaAs wafer under UHV conditions in a first growth chamber, transferring the wafer through a transfer module under UHV to a second growth chamber that is also under UHV, and growing the dielectric by evaporation of Ga.sub.2 O.sub.3 from a solid source, the process carried out such that the integrated impurity exposure of the surface is at most 100 Langmuirs. Articles according to the invention have low interface state density (&lt;10.sup.11 /cm.sup.2 .multidot.eV) and interface recombination velocity (&lt;10.sup.4 cm/s). Semiconductor/Ga.sub.2 O.sub.3 structures according to the invention can be used advantageously in a variety of electronic or optoelectronic devices, e.g., GaAs-based MOS-FETs, HBTs, lasers on solar cells.

Article comprising a gallium layer on a GaAs-based semiconductor, and

In accordance with the invention, a contaminated III-V semiconductor surface is cleaned by the sequential steps of exposure to hydrogen plasma, chemical etching in chlorine and annealing in vacuum. In a preferred embodiment, a semiconductor of the gallium arsenide family is subjected to hydrogen plasma in an ECR system for 20-120 minutes, then, without breaking vacuum, subjected to a Cl.sub.2 chemical etch at 250.degree. C.-450.degree. C. for 1-5 minutes. Again, without breaking vacuum, the semiconductor is annealed at 200.degree. C.-600.degree. C. for 5-15 minutes. To obtain good surface reconstruction, annealing preferably takes place at a temperature 300.degree. C. or above. The semiconductor surface thus processed is atomically smooth and sufficiently clean to permit regrowth of a high quality epitaxial layer.

Process for removing surface contaminants from III-V semiconductors

A novel method of making articles that comprise a periodic heteroepitaxial semiconductor structure is disclosed. The method pertains to growth of the periodic structure by MBE, CVD or similar growth techniques, and involves periodically changing the substrate temperature. For instance, a periodic multilayer GaAs/AlGaAs is grown by MBE, with the substrate temperature cycled between 600.degree. C. and 700.degree. C. The novel method can produce multilayer structures of uniformly high material quality.

Growing community of inventors

Summit, NJ, United States of America

Joseph Petrus Mannaerts