Hughes Aircraft Company

Integrated Process Equipment Corporation

Joseph P Prusak

Sherman K Poultney

George J Gardopee

Peter B Mumola

Paul J Clapis

Thomas J McHugh

A method for co-registering a semiconductor wafer (14) undergoing work in one or more blind process modules (10), (12) requires a means (16), (18) for consistently and repeatably registering the semiconductor wafer (14) to each process module (10), (12). Given this consistent and repeatable singular wafer registration means (16), (18), the location of the coordinate axes of each process module (10), (12) is determined with respect to the position of the semiconductor wafer (14) that is registered therein. The present invention method provides three approaches for determining the location of these axes: (1) an absolute location of the axes, (2) a relative location of the axes using one blind process module (10) to measure the position of a pattern etched into the semiconductor wafer (14) with another blind process module (12), and (3) a relative location of the axes using one blind process module (10) to measure surface or layer thickness characteristics in the semiconductor wafer (14) as modified by wafer processing. Regardless of which approach is followed, the determination of the location of the coordinate axes in each process module (10), (12) is an effective co-registration of the semiconductor wafer (14).

Method for co-registering semiconductor wafers undergoing work in one or

A method for controlling the flow of semiconductor wafers within a semiconductor wafer processing facility. This method includes a wafer storage and preparation area (10) and a wafer metrology and etch area (12), both of which are monitored and/or controlled by a master controller (14). The wafer storage and preparation area (10) is typically kept at a class 10 clean room level and is comprised of a wafer storage area (16) and a wafer preparation area (18). The wafer metrology and etch area (12) is typically kept at a class 1000 clean room level and is comprised of an I/O cassette module (22), a wafer pre-aligner (24), a wafer router (26), a wafer metrology instrument (28), and a wafer etching instrument (30). The semiconductor wafers are transported, either manually or automatically, between the wafer storage area (16) and the wafer preparation area (18), as well as between the wafer storage and preparation area (10) and the wafer metrology and etch area (12), within wafer storage cassettes ( 20). The semiconductor wafers are individually transported between the I/O cassette module (22), the wafer pre-aligner (24), the wafer metrology instrument (28), and the wafer etching instrument (30) by the wafer router (26).

Wafer flow architecture for production wafer processing

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Danbury, CT, United States of America

Joseph P Prusak