Apple Inc.

Joseph P Grass

Jerome Francis Duluk, Jr

Abbas Rashid

Richard E Hessel

Abraham Mammen

Bo Hong

Jason Rupert Redgrave

Tuan Anh Nguyen

Joseph P Bratt

Emerson S Fang

Sushma Shrikant Trivedi

Vaughn Todd Arnold

Jack Benkual

Sidong Li

Shun Wai Go

Stephen L Dodgen

Hengwei Hsu

Matthew N Papakipos

Nathan D Tuck

George Cuan

Sam Ng

Zhaoyu Gong

Lindy Fung

Albert Suan-Wei Tsay

Thomas Y Ho

Thomas Y Yo

A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.

Deferred shading graphics pipeline processor having advanced features

A deferred graphics pipeline processor comprising a texture unit and a texture memory associated with the texture unit. The texture unit applies texture maps stored in the texture memory, to pixel fragments. The textures are MIP-mapped and comprise a series of texture maps at different levels of detail, each map representing the appearance of the texture at a given distance from an eye point. The texture unit performs tri-linear interpolation from the texture maps to produce a texture value for a given pixel fragment that approximates the correct level of detail. The texture memory has texture data stored and accessed in a manner which reduces memory access conflicts and thus improves throughput of said texture unit.

Method and apparatus for generating texture

A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple-stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.

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Menlo Park, CA, United States of America

Joseph P Grass