Maxim Integrated Products, Inc.

Quester Technology, Inc.

Joseph P Ellul

Khanh Tran

Albert M Bergemont

Uppili Sridhar

Edward Martin Godshalk

Anuranjan Srivastava

Kiyoko Ikeuchi

Alexander Kalnitsky

Chung J Lee

Giovanni Antonio Foggiato

Scott W Barry

David T Ryan

David Leksell

Ming Xi Chan

Jeanne L Luce

Iqbal A Shareef

Yi-Sheng Anthony Sun

Robert F Scheer

Viktor Zekeriya

Melvin Schmidt

Daniel Henry Rosenblatt

Jonathan Herman

Glenn Nobinger

Vijaykumar Ullal

Nazanin Davani

Elliott Simons

Stephen M Campbell

A process for producing a magnetic core material is disclosed. The process includes distributing particles within a solution medium to form a colloidal solution. The process further includes modifying a surface chemistry of the particles by adding one or more additives to the colloidal solution. The process further includes gelating the colloidal solution to form the magnetic core material.

Controlling the morphology in metal loaded paste material

Semiconductor devices are described that include a capacitor integrated therein. In an implementation, the semiconductor devices include a substrate. The substrate includes multiple capacitor regions, such as a first capacitor region and a second capacitor region that are adjacent to one another. Each capacitor region includes trenches that are formed within the substrate. A metal-insulator-metal capacitor is formed within the trenches and at least partially over the substrate. The trenches disposed within the first capacitor region are at least substantially perpendicular to the trenches disposed within the second capacitor region.

Semiconductor device having trench capacitor structure integrated therein

Semiconductor devices are described that include a capacitor integrated therein. In an implementation, the semiconductor devices include a substrate including a dopant material of a first conductivity type. A plurality of trenches are formed within the substrate. The semiconductor devices also include a diffusion region having dopant material of a second conductivity type formed proximate to the trenches. A capacitor is formed within the trenches and at least partially over the substrate. The capacitor includes at least a first electrode, a second electrode, and a dielectric material formed between the first and second electrodes.

Semiconductor device having capacitor integrated therein

A method of deposition of magnetic nanocomposites. The method comprises providing an electron beam evaporation system having at least two independent hearths with independently controllable electron beams, each to melt and evaporate materials in the respective hearth, each hearth having a respective shutter for selectively controlling the deposition of the respective material in the respective hearth, placing a ferromagnetic material in a first hearth, placing an oxide in a second hearth which, when evaporated and deposited, will form an insulator, maintaining an oxygen environment in the electron beam evaporation system while evaporating the materials in the first hearth and second hearth, and depositing the magnetic nanocomposite on at least one wafer in the electron beam evaporation system. Various aspects of the method are disclosed.

High rate deposition method of magnetic nanocomposites

Inductors and methods for integrated circuits that result in inductors of a size compatible with integrated circuits, allowing the fabrication of inductors, with or without additional circuitry on a first wafer and the bonding of that wafer to a second wafer without wasting of wafer area. The inductors in the first wafer are comprised of coils formed by conductors at each surface of the first wafer coupled to conductors in holes passing through the first wafer. Various embodiments are disclosed.

Inductors and methods for integrated circuits

A 3D chip package is disclosed that includes a carrier substrate with a first cavity and a second cavity formed therein. A first structure is attached to the carrier substrate at least partially in the first cavity, and a second structure is attached to the carrier substrate at least partially in the second cavity, where the first and second structures include electrical circuitry. A shield layer may be disposed between the carrier substrate and the first structure and/or the second structure for isolating the first structure and/or the second structure at least one of electrically, magnetically, optically, or thermally. In some embodiments, the shield layer may be a dielectric shield layer for dielectrically coupling the first structure and the second structure. The first structure and the second structure may be homogeneous or heterogeneous.

3D chip package with shielded structures

Inductors having inductor axis parallel to substrate surface

Passive, high density, 3d IC capacitor stacks and methods that provide the integration of capacitors and integrated circuits in a wafer to wafer bonding process that provides for the integration of capacitors formed on one wafer, alone or with active devices, with one or more integrated circuits on one or more additional wafers that may be stacked in accordance with the process. Wafer to wafer bonding is preferably by thermo-compression, with grinding and chemical mechanical polishing being used to simply aspects of the process of fabrication. Various features and alternate embodiments are disclosed.

Minimum cost method for forming high density passive capacitors for replacement of discrete board capacitors using a minimum cost 3D wafer-to-wafer modular integration scheme

A new and improved method of forming a thin film resistor is provided herein that overcomes many of the drawbacks of prior art methods. More specifically, the new method of forming a thin film provides for a well-controlled dielectric thickness under the thin film resistor which is useful for laser trimming purpose. The preferred thickness of the dielectric layer is an integer of a quarter wavelength of the optical energy used to laser trim the resistor. The new method also provides contacts to the thin film resistor that do not directly contact the thin film resistor so as to prevent any adverse process effects to the thin film resistor. More specifically, the method of forming a thin film resistor includes the steps of forming a pair of spaced-apart polysilicon islands over a semiconductor substrate, forming a dielectric layer over and between the polysilicon islands, forming contact holes through the dielectric layer to expose respective first regions of the polysilicon islands, forming a layer of thin film resistive material that extends between respective first regions of the polysilicon islands, forming another dielectric layer over the polysilicon islands and over the thin film resistive material layer, and forming metal contacts through the second dielectric layer in a manner that they make contact to respective second regions of the polysilicon islands, wherein the first and second regions of the polysilicon islands are different.

Method of forming laser trimmable thin-film resistors in a fully planarized integrated circuit technology

A method of modifying a layer of thin film composite material to achieve one or more desired properties for the thin film layer which cannot be achieved by heat treatment at all practical temperatures of operation allowable by particular integrated circuit processes. In particular, the thin film composite material is subjected to an ion implantation process. Depending on the doping species, the doping concentration, the doping energy, and other ion implantation parameters, one or more properties of the deposited thin film resistive layer can be modified. Such properties may include electrical, optical, thermal and physical properties. For instance, the sheet resistance and/or the temperature coefficient of resistance of the thin film composite material may be increased or decreased by appropriately implanting ions into the material. The ion implantation can be applied globally in order to modify one or more properties of the entire deposited thin film composite layer. Alternatively, the ion implantation can be applied regionally in order to modify the thin film composite material at a first region, not modify the thin film composite material at a second region, and/or modify the thin film composite material in another way at a third region.

Method of modifying properties of deposited thin film material

This invention relates to the design of apparatus for processing electronic devices, including equipment for chemical vapor deposition or transport polymerization. The new designs of gas separator plates, their configuration, and the regulation of gas flows through the system provides control over the pattern of precursor gas flow away from the separation plates, thereby decreasing the amount of byproducts that are deposited on the plates and throughout the reactor. New designs for shaping other surfaces of the dispersion head reduces contamination of those elements, and new designs for chamber panels decrease the deposition of byproducts on those surfaces, as well as other elements of the reactor. Decreasing deposition of byproducts increases the amount and the quality of the film that can be deposited without requiring the system to be shut down for cleaning. This increases the throughput of products in the deposition process, thereby increasing the efficiency of electronic device manufacture and lowering the cost.

Chamber for reducing contamination during chemical vapor deposition

This invention relates to the design of apparatus for processing electronic devices, including equipment for chemical vapor deposition. The new designs of gas separator plates, their configuration, and the regulation of gas flows through the system provides control over the pattern of precursor gas flow away from the separation plates, thereby decreasing the amount of byproducts that are deposited on the plates and throughout the reactor. New designs for shaping other surfaces of the dispersion head reduces contamination of those elements, and new designs for chamber panels decrease the deposition of byproducts on those surfaces, as well as other elements of the reactor. Decreasing deposition of byproducts increases the amount of thin film, and the quality of the film which can be deposited without requiring the system to be shut down. This increases the throughput of products in the deposition process, thereby increasing the efficiency of electronic device manufacture and lowering the cost.

Growing community of inventors

San Jose, CA, United States of America

Joseph P Ellul