Intel Corporation

Vlsi Technology, Inc.

Honeywell International Inc.

Joseph Murray

Michael T Klinglesmith

Blaise B Fanning

Mikal Hunsaker

Sridhar Lakshmanamurthy

Robert P Adler

Eran Tamari

Mohan Nair

Rohit R Verma

Kar Leong Wong

Gary J Lavelle

Kevin Wayne Locker

Debendra Das Sharma

Devadatta V Bodas

James W Alexander

Malay Trivedi

Michelle C Jen

Deep K Buch

Byron R Gillespie

Vui Yong Liew

Elliot D Garbus

Ned D Garinger

Geetani R Edirisooriya

Richard Paul Mackey

David R Smith

Nick G Eskandari

Ravi S Rao

David Gerard Spaniol

Jeff J McCoskey

Peter H Sorrells

Bruce Moore

Vijayendra K Hoskoti

Jeff M Michelsen

Lay Leng Cheok

King-Seng Hu

Joseph Gaubatz

Lee K Koh

Mikal C Hunsaker

Mohan K Nair

In one embodiment, the present invention includes a method for receiving a request in a router from a first endpoint coupled to the router, where the request is for an aggregated completion. In turn, the router can forward the request to multiple target agents, receive a response from each of the target agents, and consolidate the responses into an aggregated completion. Then, the router can send the aggregated completion to the first endpoint. Other embodiments are described and claimed.

Systems and an apparatus with a sideband interface interconnecting agents with at least one router

A low-latency internode messaging scheme bypasses the nodes' I/O stacks to use fabrics or links that support memory process logic (e.g., SMI) or electrical process logic (e.g., PCIe) on the 'node side' between the nodes and a pooled memory controller (or pooled storage controller), and on the 'pooled side' between that controller and its pooled memory or storage. The controller may translate and redirect messages and look up addresses. The approaches accommodate 2-level memory (locally attached node memory and accessible pooled memory) with either or both levels private, globally shared, allocated to a subset of the nodes, or any combination. Compatible interrupt schema use the messaging links and components.

Low-latency internode communication

In one embodiment, a system-on-chip (SoC) can be configured to receive a request from a master agent in a fabric coupled to the master agent, send a show command grant to the master agent responsive to selection of the request by the fabric, receive a command portion of a transaction corresponding to the request in the fabric and determine a target agent to receive the transaction based on the command portion, and thereafter send a transaction grant to the master agent for the transaction. Other embodiments are described and claimed.

Providing multiple decode options for a system-on-chip (SoC) fabric

An inbound sideband interface is provided to receive a message over a first sideband link, and parity logic is provided to calculate a parity bit for the message. Further, an outbound sideband interface is provided to forward the message to another device over a second sideband link. The second sideband link includes a plurality of data wires and a parity bit wire. The message is forwarded over at least some of the data wires and the parity bit is sent to the other device over the parity bit wire to correspond with the message.

Sideband parity handling

In one embodiment, the present invention includes a method for receiving a request for a transaction from a first agent in a fabric and obtaining an address, a requester identifier, a tag, and a traffic class of the transaction, and determining a channel of a target agent to receive the transaction based on at least two of the address, the requester identifier, the tag, and the traffic class. Based on this channel determination, the transaction can be sent to the channel of the target agent. Other embodiments are described and claimed.

Supporting multiple channels of a single interface

Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein.

Dynamic link width adjustment

Aggregating completion messages in a sideband interface

In one embodiment, the present invention includes method for entering a credit initialization state of an agent state machine of an agent coupled to a fabric to initialize credits in a transaction credit tracker of the fabric. This tracker tracks credits for transaction queues of a first channel of the agent for a given transaction type. The agent may then assert a credit initialization signal to cause credits to be stored in the transaction credit tracker corresponding to the number of the transaction queues of the first channel of the agent for the first transaction type. Other embodiments are described and claimed.

Common idle state, active state and credit management for an interface

In one embodiment, the present invention is directed to an integrated endpoint having a virtual port coupled between an upstream fabric and an integrated device fabric that includes a multi-function logic to handle various functions for one or more intellectual property (IP) blocks coupled to the integrated device fabric. The integrated device fabric has a primary channel to communicate data and command information between the IP block and the upstream fabric and a sideband channel to communicate sideband information between the IP block and the multi-function logic. Other embodiments are described and claimed.

Flexibly integrating endpoint logic into varied platforms

In one embodiment, a method includes determining whether producer-consumer ordering rules have been met for a first transaction to be sent from a source agent to a target agent via a fabric, and if so a first request for the first transaction is sent from the source agent to the fabric in a first clock cycle. Then a second request can be sent from the source agent to the fabric for a second transaction in a pipelined manner. Other embodiments are described and claimed.

Issuing requests to a fabric

An integrated endpoint having a virtual port coupled between an upstream fabric and an integrated device fabric that includes a multi-function logic to handle various functions for one or more intellectual property (IP) blocks coupled to the integrated device fabric is disclosed. The integrated device fabric has a primary channel to communicate data and command information between the IP block and the upstream fabric and a sideband channel to communicate sideband information between the IP block and the multi-function logic.

Growing community of inventors

Scottsdale, AZ, United States of America

Joseph Murray