Emc Corporation

Emc IP Holding Company LLC

Joseph M Pirrotta

Marco Ciaffi

William Duane

A technique provides power control for an electronic device. The technique involves receiving a 'turn off' command from a user of the electronic device, the 'turn off' command directing the electronic device to turn off. The technique further involves, in response to the &#x201c;turn off&#x201d; command, invoking an authentication operation to authenticate the user, the authentication operation providing an authentication result indicating whether the electronic device considers the user to be an authorized operator of the electronic device. The technique further involves performing a power control operation in response to the authentication result, the power control operation (i) powering down location identification circuitry when the authentication result indicates that the electronic device considers the user to be an authorized operator, and (ii) maintaining power to the location identification circuitry when the authentication result indicates that the electronic device considers the user not to be an authorized operator.

Providing power control to an electronic device using authentication

A method is used in calibrating an internal clock generator. An electronic device is instructed to output a high-speed clock signal which is communicated to an external calibration system. The high-speed clock signal is measured using measurement equipment associated with the external calibration system. One or more calibration values based on the measured clock signal value are calculated. The calculated calibration values are communicated to the electronic device. The electronic device is instructed to generate a calibrated clock signal by applying the one or more calibration values to an internally generated clock signal.

Calibrating a high-speed clock signal generated using a processor internal to the electronic authentication device without using a crystal oscillator

An authentication device comprises a processor having a reset input, a trigger source coupled to the reset input of the processor, and interface circuitry for outputting codes generated by the processor. The trigger source may comprise, for example, a trigger button having an associated switch that when actuated supplies a reset to the reset input. The processor is configured to analyze a given reset applied to the reset input to determine if the reset is an inadvertent reset or a reset generated by the trigger source. The processor generates a code responsive to the reset if the reset is determined to be a reset generated by the trigger source. The code may be supplied to a host device which communicates the code to an authentication server for authentication.

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Framingham, MA, United States of America

Joseph M Pirrotta