Advanced Micro Devices Corporation

Joseph Kucera

Allan Parker

Darlene G Hamilton

Colin Stewart Bill

Edward V Bautista, Jr

Ken Cheong Cheah

Weng Fook Lee

Boon Tang Teh

An address sequencer is fabricated on a semiconductor substrate having flash memory cells fabricated thereon for sequencing through the flash memory cells during BIST (built-in-self-test) of the flash memory cells. The address sequencer includes an address sequencer control logic and address sequencer buffers fabricated on the semiconductor substrate. The address sequencer buffers generate a plurality of bits indicating an address of the flash memory cells. The address sequencer control logic controls the buffers to sequence through a respective sequence of bit patterns for each of a plurality of BIST modes.

Address sequencer within BIST (Built-in-Self-Test) system

A memory device having a plurality of memory cells that are group into at least two group of cells. Each cell is capable of being programmed in at least two modes. A mode indicator is associated with each group of cells. The mode indicator indicates which programming mode is used to access the cells. The mode indicator is one or more bits and optionally is user selectable.

Mixed mode multi-level indicator

Mode indicator for multi-level memory

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Austin, TX, United States of America

Joseph Kucera