Intel Corporation

Joseph K Olivas

Jason W Brandt

Ahmad Yasin

Beeman C Strong

Jonathan D Combs

Ofer Levy

Michael W Chynoweth

Andreas Kleen

Rajshree Chabukswar

John M Esper

Christopher Mark Chrulski

An example processor that includes a decoder, an execution circuit, a counter, and a last branch recorder (LBR) register. The decoder may decode a branch instruction for a program. The execution circuit may be coupled to the decoder, where the execution circuit may execute the branch instruction. The counter may be coupled to the execution circuit, where the counter may store a cycle count. The LBR register coupled to the execution circuit, where the LBR register may include a counter field to store a first value of the counter when the branch instruction is executed and a type field to store type information indicating a type of the branch instruction.

Branch type logging in last branch registers

Growing community of inventors

Folsom, CA, United States of America

Joseph K Olivas