Texas Instruments Corporation

Joseph Joe

James J Walsh

Yutaka Takahashi

Robert W Milhaupt

Ian Chen

James Bridgwater

Kazumi Haijima

A computer system (6,7) includes first and second I/O circuits (932, 934, 51, 97), first and second buses (904, 83) respectively coupled to the first and second I/O circuits (932, 934, 51, 97), a memory (106), a third bus (104) coupled to the memory (106), and first and second bus interface circuits (902, 6920) connected between the third bus (104) and the first and second buses (904, 83) respectively. A direct memory access (DMA) controller (910) is coupled to the first bus (904) and to the first bus interface circuit (902), and a serial communications circuit (7010, 6910, 7020) is connected between the DMA controller (910) and the second bus interface circuit (6920). As an example, in the present invention a single DMA controller may be used to provide DMA capability to both a notebook computer and a docking station, using an interface between the notebook computer and the docking station to transfer DMA related information between the DMA controller and a requesting device in the docking station. Other devices, systems and methods are also disclosed.

Structure and method of performing DMA transfers between memory and I/O

A computer system (6,7) includes first and second I/O circuits (932, 934), first and second buses (904, 83) respectively coupled to the first and second I/O circuits (932, 934), a memory (106), a third bus (104) coupled to the memory (106), and first and second bus interface circuits (902, 6920) connected between the third bus (104) and the first and second buses (904, 83) respectively. A direct memory access (DMA) controller (910) is coupled to the first bus (904) and to the first bus interface circuit (906), and a serial communications circuit (7010, 6910, 7020) is connected between the DMA controller (910) and the second bus interface circuit (6920). As an example, in the present invention a single DMA controller may be used to provide DMA capability to both a notebook computer and a docking station, using an interface between the notebook computer and the docking station to transfer DMA station. Other devices, systems and methods are also disclosed.

Computer system and an electronic circuit utilizing a single DMA

A microprocessor device (102) includes a central processing unit (702) having a clock input, a clock generator (OSC, PLL) of clock pulses, a logic circuit (708) having an output to supply a clock control signal (SUSP), and a clock gate (3610) fed by the clock pulses and having a clock gate output (CPU.sub.-- CLK) coupled to the clock input of the central processing unit. The clock gate (3610) responds to the clock control signal (SUSP) to prevent said clock pulses (CPU.sub.-- CLK) from reaching the central processing unit within one clock cycle of a change in said clock control signal. Other devices, systems and methods are also disclosed.

Clock control circuits, systems and methods

A computer system (6,7) includes first and second I/O circuits (932, 934), 51, 97 first and second buses (904, 83) respectively coupled to the first and second I/O circuits (932, 934), 51, 97 a memory (106), a third bus (104) coupled to the memory (106), and first and second bus interface circuits (902, 6920) connected between the third bus (104) and the first and second buses (904, 83) respectively. A direct memory access (DMA) controller (910) is coupled to the first bus (904) and to the first bus interface circuit (902), and a serial communications circuit (7010, 6910, 7020) is connected between the DMA controller (910) and the second bus interface circuit (6920). As an example, in the present invention a single DMA controller may be used to provide DMA capability to both a notebook computer and a docking station, using an related information between the DMA controller and a requesting device in the docking station. Other devices, systems and methods are also disclosed.

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Plano, TX, United States of America

Joseph Joe