Interdigital Technology Corporation

Interdigital Patent Holdings, Inc.

General Instrument Corporation

Joseph Gredone

Timothy A Axness

Alfred Stufflet

Douglas R Castor

Chunxuan Ye

Rui Yang

Liangping Ma

Joseph M Murray

Martino M Freda

Mihaela C Beluri

Jean-Louis Gauvreau

Erdem Bala

Alpaslan Demir

Angelo A Cuffaro

Debashish Purkayastha

Zinan Lin

Athmane X Touag

Amith Vikram Chincholi

Yuying Dai

Michael F Starsinic

Rocco Di Girolamo

Yogendra C Shah

Paul L Russell, Jr

Edward L Hepler

David S Bass

William C Hackett

Richard P Gorman

Samian Kaur

Inhyok Cha

Rocco DiGirolamo

Andreas U Schmidt

Andreas Leicher

Dolores F Howry

Alec Brusilovsky

Tony Nasuti

David E Chodelka

A method and apparatus for operating supplementary cells in licensed exempt (LE) spectrum. An aggregating cell operating in a frequency division duplex (FDD) licensed spectrum is aggregated with a LE supplementary cell operating in a time sharing mode for uplink (UL) and downlink (DL) operations. The LE supplementary cell may be an FDD supplementary cell dynamically configurable between an UL only mode, a DL only mode, and a shared mode, to match requested UL and DL traffic ratios. The LE supplementary cell may be a time division duplex (TDD) supplementary cell. The TDD supplementary cell may be dynamically configurable between multiple TDD configurations. A coexistence capability for coordinating operations between the LE supplementary cell with other systems operating in the same channel is provided. Coexistence gaps are provided to measure primary/secondary user usage and permit other systems operating in the LE supplementary cell channel to access the channel.

Method and apparatus for operating supplementary cells in licensed exempt spectrum

A certification provenance tree (CPT) structure may provide information concerning a layered certification of a device that comprises a hierarchy of components. The CPT structure may include a hierarchy of secure certification provenance document (SCPD) structures. Each SCPD structure in the hierarchy may represent a given component at a given level of the hierarchy of components of the device. Each SCPD structure may include a field that stores a certification proof indicating that security properties of the given component have been certified by a certification authority. An SCPD structure may further include accreditation information fields that store a pointer to an SCPD structure of a component at a next layer of the hierarchy of components of the device. The pointer may provide an indication of assurance that the component at that next layer will perform securely within this component at said given layer.

Layered certification

A method for increasing data rate in wireless communications includes selectively activating a plurality of hardware accelerators, and performing, using the hardware accelerators, data processing for modem data based on parameters received from a processor.

UMTS FDD modem optimized for high data rate applications

A device may include a trusted component. The trusted component may be verified by a trusted third party and may have a certificate of verification stored therein based on the verification by the trusted third party. The trusted component may include a root of trust that may provide secure code and data storage and secure application execution. The root of trust may also be configured to verify an integrity of the trusted component via a secure boot and to prevent access to the certain information in the device if the integrity of the trusted component may not be verified.

Validation and/or authentication of a device for communication with network

A method and apparatus for optimization of a modem for high data rate applications comprise a plurality of hardware accelerators which are configured to perform data processing functions, wherein the hardware accelerators are parameterized, a processor is configured to selectively activate accelerators according to the desired function to conserve power requirements and a shared memory configured for communication between the plurality of hardware accelerators.

A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller. Each nibble has at least two start bits whose states collectively represent both a function and/or destination.

Hybrid parallel/serial bus interface

A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The data block is employed by a gain controller.

A hybrid serial/parallel bus interface method and apparatus for a base station has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block. The method/apparatus is adaptable for either bidirectional or unidirectional applications.

Apparatus and method for bidirectional transfer of data by a base station

A hybrid serial/parallel bus interface has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.

A hybrid serial/parallel bus interface method for a base station has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.

Method employed by a base station for transferring data

A hybrid serial/parallel bus interface for a base station has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.

Base station having a hybrid parallel/serial bus interface

A hybrid serial/parallel bus interface method for a user equipment (UE) has a data block demultiplexing device. The data block demultiplexing device has an input configured to receive a data block and demultiplexes the data block into a plurality of nibbles. For each nibble, a parallel to serial converter converts the nibble into serial data. A line transfers each nibble's serial data. A serial to parallel converter converts each nibble's serial data to recover that nibble. A data block reconstruction device combines the recovered nibbles into the data block.

Method employed by a user equipment for transferring data

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Chalfont, PA, United States of America

Joseph Gredone