International Business Machines Corporation

Joseph G Hoffarth

Suryadevara Vijayakumar Babu

John A Welsh

John P Wiley

Voya Rista Markovich

John M Lauffer

Donald J Lazzarini

Issa Said Mahmoud, Deceased

Vu Q Bui

Kevin K Chan

Chi Shih Chang

Walter E Mlynko

Allan Robert Knoll

Keith A Snyder

John F Rembetski

Peter A Agostino

Robert T Wiley

Vicki J Malueg

William F Herrmann

Kenneth D Mack

A process for manufacturing a multi-layer printed circuit board comprises a first metallic layer, a first Ta or Hf layer on one face of the first metallic layer, a first layer of Ta.sub.2 O.sub.5 or HfO on a face of the Ta or Hf layer opposite the first metallic layer, a second metallic layer on the Ta.sub.2 O.sub.5 or HfO layer opposite the Ta or Hf layer, a first dielectric layer on the first metallic layer opposite the Ta of Hf layer, and a second dielectric layer on the second metallic layer opposite the Ta.sub.2 O.sub.5 or HfO layer. A multi-layer printed circuit board is formed by adding the following layers to form the second capacitor. A third metallic layer on said second dielectric layer, a second Ta or Hf layer on a face of the third metallic layer, a second Ta.sub.2 O.sub.5 or HfO layer on a face of the second Ta or Hf layer opposite the third metallic layer, a fourth metallic layer on the second Ta.sub.2 O.sub.5 or HfO layer opposite the second Ta or Hf layer, and a third dielectric layer on the fourth metallic layer opposite the second Ta.sub.2 O.sub.5 or HfO layer.

Capacitor formed within printed circuit board

A multi-layer printed circuit board comprises a first metallic layer, a first Ta or Hf layer on one face of the first metallic layer, a first layer of Ta.sub.2 O.sub.5 or HfO on a face of the Ta or Hf layer opposite the first metallic layer, a second metallic layer on the Ta.sub.2 O.sub.5 or HfO layer opposite the Ta or Hf layer, a first dielectric layer on the first metallic layer opposite the Ta of Hf layer, and a second dielectric layer on the second metallic layer opposite the Ta.sub.2 O.sub.5 or HfO layer. A multi-layer printed circuit board is formed by adding the following layers to form the second capacitor. A third metallic layer on said second dielectric layer, a second Ta or Hf layer on a face of the third metallic layer, a second Ta.sub.2 O.sub.5 or HfO layer on a face of the second Ta or Hf layer opposite the third metallic layer, a fourth metallic layer on the second Ta.sub.2 O.sub.5 or HfO layer opposite the second Ta or Hf layer, and a third dielectric layer on the fourth metallic layer opposite the second Ta.sub.2 O.sub.5 or HfO layer.

A multilayered circuit board assembly which includes a plurality of layered subassemblies each having electrically conducting wiring and at least one through hole therein. A first of these subassemblies possesses a greater wiring dnesity than the others while a second subassembly possesses a lesser resistance (and wiring density) than the others. In one example, several (e.g. at least four) such layered subassemblies may be included in the overall assembly such that those layers located along one side of the board may possess substantially greater wiring densities than the layers on the other side of the board while those layers on said other side will in turn possess lesser resistance (and greater current capacities). There are also described at least three methods for making the above multilayered circuit board assembly. Such a structure may be utilized in supercomputer applications.

High density circuit board and method of making same

A multilayer circuit board having a conformal layer of an insulating material separating a circuit core from an adjacent insulating layer is disclosed. The conformal layer encapsulates the substrate and conductive pattern of circuit lines in the circuit core, thereby reducing failures caused by impurities trapped during lamination. The multilayer circuit board is manufactured by coating at least one circuit core with the conformal layer of insulating material before final lamination of the circuit cores into a multilayer circuit board.

Method of making multilayer circuit boards having conformal Insulating

A plasma etching process is disclosed wherein the substrate to be etched is first exposed to an etchant gas containing a volatile organohalide. When the etch rate is stabilized, the organohalide in the etchant gas is replaced by oxygen whereby the etch rate of the substrate is immediately increased to a substantially higher value. When the above is repeatedly done a substantially higher average etch rate is obtained.

Method of plasma etching a substrate with a gaseous organohalide compound

Multilayer circuit board with reduced susceptability to shorts caused by

The invention features a method of fabricating a printed circuit board having improved circuit board performance. The circuit board utilizes low dielectric materials having dielectric constants of less than 3.0. The dielectric layers are spaced apart from plated through-holes, thus eliminating the interface between the metallized surface of the through-hole and the dielectric sheet. Thus, the low dielectric layer is not required to be plated. The lower dielectric character of the laminates improves wiring density, circuit speed, and provides for thinner laminates and cores.

High performance circuit boards

A method for improving the adhesion of a polymer such as an epoxy resin to an electrolytic copper surface wherein the copper surface to be adhered is exposed to gas plasma containing a fluorohydrocarbon.

Interlaminate adhesion between polymeric materials and electrolytic

The present invention provides a process for plasma cleaning and an improved gas mixture for use in a plasma cleaning process. The gas mixture of the present invention includes the normal process gases such as oxygen and carbon tetrafluoride. However, the mixture also includes a small percentage of a large mass inert gas such as Argon or Krypton. This large mass gas molecule mechanically removes any polymerized fluorocarbon that forms on the surface being cleaned thereby significantly enhancing the rate of etch or cleaning. It has been found that five to twenty percent of the inert gas is the preferred range and that ten percent produces optimum results.

Plasma etch enhancement with large mass inert gas

Residual catalyst is removed from a dielectric substrate by exposing the substrate to a plasma formed from an inert gas.

Removal of residual catalyst from a dielectric substrate

A method of making a printed circuit board is disclosed wherein metallic seed particles are applied to a surface of the substrate. An image of the desired conductor pattern is defined by a maskant layer to permit the subsequent electroless deposition of the conductor material upon the exposed seeded areas of the substrate. Then, the substrate surface is subjected to a plasma discharge to facilitate removal of the seed particles.

Method of removing seed particles from circuit board substrate surface

A procedure for cleaning drilled holes in laminated workpieces such as printed electric circuit boards includes the steps of coating a cutting instrument, such as a drill bit, with a liquid tracer prior to a cutting or drilling operation. During the cutting or drilling operation, the liquid tracer becomes mixed with material such as an electrically insulating binder layer disposed between opposed metal plates of the circuit board. Any smearing of the insulation material upon exposed metal surfaces of the drilled hole contain elements of chemical compounds used in the tracer. After extraction of the drill bit from the circuit board, the board is placed in a plasma reactor wherein the metal surfaces are etched to remove any smears and debris of the insulation material found on the exposed metal surfaces. The tracer elements, such as deuterium and phosphorus are monitored in the effluent plasma of the reactor to determine when the cleaning of drilled holes in the board is completed.

Growing community of inventors

Binghamton, NY, United States of America

Joseph G Hoffarth