Marvell Asia Pte., Ltd.

Joseph Featherston

Aadeetya Shreedhar

Wilson Parkhurst Snyder, Ii

Albert Ma

Jason D Zebchuk

A circuit and corresponding method perform resource arbitration. The circuit comprises a pending arbiter (PA) that outputs a PA selection for accessing a resource. The PA selection is based on PA input. The PA input represents respective pending-state of requesters of the resource. The circuit further comprises a valid arbiter (VA) that outputs a VA selection for accessing the resource. The VA selection is based on VA input. The VA input represents respective valid-state of the requesters. The circuit performs a validity check on the PA selection output. The circuit outputs a final selection for accessing the resource by selecting, based on the validity check performed, the PA selection output or VA selection output. The circuit addresses arbitration fairness issues that may result when multiple requesters are arbitrating to be selected for access to a shared resource and such requesters require a credit (token) to be eligible for arbitration.

Circuit and method for resource arbitration

A system and corresponding method perform large memory transaction (LMT) stores. The system comprises a processor associated with a data-processing width and a processor accelerator. The processor accelerator performs a LMT store of a data set to a coprocessor in response to an instruction from the processor targeting the coprocessor. The data set corresponds to the instruction. The LMT store includes storing data from the data set, atomically, to the coprocessor based on a LMT line (LMTLINE). The LMTLINE is wider than the data-processing width. The processor accelerator sends, to the processor, a response to the instruction. The response is based on completion of the LMT store of the data set in its entirety. The processor accelerator enables the processor to perform useful work in parallel with the LMT store, thereby improving processing performance of the processor.

System and method for large memory transaction (LMT) stores

A circuit and corresponding method employ directional link (DL) credit pools. The circuit comprises the DL credit pools and transmit (TX) port logic. The DL credit pools are associated with neighboring node (NBN) TX ports of a NBN on a chip. The NBN is coupled to a node on the chip via the circuit. The node includes the circuit. The TX port logic admits a received packet to the circuit based on routing information in the received packet and produces a TX packet by updating the routing information, in the received packet admitted, to indicate a NBN TX port of the NBN TX ports. The TX port logic transmits the TX packet produced to the NBN based on a DL credit pool of the DL credit pools that is associated with the NBN TX port indicated. Use of the DL credit pool mitigates head-of-line blocking under bursty traffic conditions.

Directional link credit-based packet transmission

A circuit and corresponding method perform resource arbitration. The circuit comprises a pending arbiter (PA) that outputs a PA selection for accessing a resource. The PA is selection based on PA input. The PA input represents respective pending-state of requesters of the resource. The circuit further comprises a valid arbiter (VA) that outputs a VA selection for accessing the resource. The VA selection is based on VA input. The VA input represents respective valid-state of the requesters. The circuit performs a validity check on the PA selection output. The circuit outputs a final selection for accessing the resource by selecting, based on the validity check performed, the PA selection output or VA selection output. The circuit addresses arbitration fairness issues that may result when multiple requesters are arbitrating to be selected for access to a shared resource and such requesters require a credit (token) to be eligible for arbitration.

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Boston, MA, United States of America

Joseph Featherston