Applied Materials, Inc.

International Business Machines Corporation

Joseph F Salfelder

Tyler Sherwood

Lan Yu

John F Cameron

Chandra V Deshpandey

Raghav Sreenivasan

Ki Cheol Ahn

Benjamin David Briggs

Laertis Economikos

Siddarth A Krishnan

Xing Chen

Dennis Stanley Grimard

Gopalakrishna B Prabhu

Fen Fen Jamin

Michael G Chafin

Kai Ma

Robert E Ryan

Donald J Delehanty

Jason Appell

Amirhasan Nourbakhsh

Daniel M Heenan

Wayne R Swart

Michael Jason Fronckowiak

Srinivas R Mirmira

Joseph M Danza

Methods of semiconductor processing may include contacting a substrate with a first slurry and a first platen. The substrate may include silicon oxide defining one or more features, a liner extending across the silicon oxide and within the one or more features, and a copper-containing layer deposited on the liner and extending within the one or more features. The first slurry and the first platen may remove a first portion of the copper-containing layer. The methods may include contacting the substrate with a second slurry and a second platen, which may remove at least a portion of the liner. The methods may include contacting the substrate with a third slurry and a third platen, which may remove a second portion of the copper-containing layer. The methods may include contacting the substrate with a fourth slurry and a fourth platen, which may remove at least a portion of the silicon oxide.

Chemical mechanical polishing for copper dishing control

Processing methods may be performed to form a filled contact hole in a mirror layer of a semiconductor substrate. The method may include forming a contact hole through a mirror layer of the semiconductor substrate by an etch process. The method may include filling the contact hole with a fill material. A portion of the fill material may overlie the mirror layer. The method may also include removing a portion of the fill material external to the contact hole by chemical mechanical polishing landing on the mirror layer.

Method of CMP integration for improved optical uniformity in advanced LCOS back-plane

Exemplary methods of processing a semiconductor substrate may include forming a layer of dielectric material on the semiconductor substrate. The methods may include performing an edge exclusion removal of the layer of dielectric material. The methods may include forming a mask material on the semiconductor substrate. The mask material may contact the dielectric material at an edge region of the semiconductor substrate. The methods may include patterning an opening in the mask material overlying a first surface of the semiconductor substrate. The methods may include etching one or more trenches through the semiconductor substrate.

Edge protection on semiconductor substrates

A method and polishing system for planarizing a substrate having one or more materials formed thereon. The method generally includes positioning the substrate in proximity with a polishing pad, dispensing a polishing fluid to the polishing pad, the polishing fluid being subjected to carbonation prior to being dispensed to the polishing pad, and polishing the substrate. The polishing system generally includes a polishing platen having a polishing pad disposed thereon and in proximity to the substrate, a controller configured to cause the polishing pad to contact the substrate, and a polishing fluid delivery system to deliver a polishing fluid to the polishing pad, the polishing fluid delivery system including a carbonation system.

Carbonation of pH controlled KOH solution for improved polishing of oxide films on semiconductor wafers

An erosion resistant electrostatic chuck 20 for holding a substrate 45 having a peripheral edge 50, in an erosive environment, comprises an electrostatic member 25 including (i) an electrode 30, and (ii) an insulator 35 covering the electrode. A barrier 55 is circumferentially disposed about the electrostatic member 25. The barrier 55 comprises a first contact surface 60 capable of being pressed against the peripheral edge 50 of the substrate 45 to form a seal around the substrate 45 to reduce exposure of the electrostatic member 25 of the chuck 20 to the erosive environment.

Barrier seal for electrostatic chuck

An electrostatic chuck (20) for holding a substrate (40) in a process chamber (50) comprises a base (25) supporting a resilient insulator (30). The insulator (30) comprises (i) an electrode (35) embedded therein; (ii) a top surface (34) with a peripheral edge (32); and (iii) cooling grooves (45) for holding coolant in the top surface (34), the tips (125) of the cooling grooves (45) and the peripheral edge (32) of the insulator (30) defining an edge gap (130) having a width w. The width w of the edge gap (130) is sized sufficiently small that the coolant in the grooves (45) cools the perimeter (120) of the substrate (40) held on the chuck (20). The insulator (30) is sufficiently thick that when a substrate (40) is electrostatically held on the chuck (20) and coolant is held in the cooling grooves (45), the insulator (30) in the edge gap (130) resiliently conforms to the substrate (40) so that substantially no coolant leaks out from the tips (125) of the cooling grooves (45). Preferably, the coolant grooves (45) do not cut into the electrode (35).

Erosion resistant electrostatic chuck with improved cooling system

Improved apparatus and a method for reducing polymerparticle contamination of semiconductor wafers being processed in a system for plasma-etching silicon dioxide. A quartz gas distribution plate contains a number of gas inlet holes having cross-sectional areas sufficiently small to prevent plasma from being present in the gas inlet holes to inhibit formation of polymer material and flaking of contamination particles therefrom. The gas inlet holes are formed on the surface of the quartz gas distribution plate directly over a wafer being processed. Alternatively, the gas inlet holes are formed in the quartz plate to radially extend to the peripheral edge of the quartz plate so that contamination particles, if any, fall outside the bounds of a wafer beneath the quartz plate. The method disclosed includes the step of feeding CHF.sub.3 gas through the gas inlet holes having cross-sectional areas sufficiently small to prevent formation of polymer within the holes and subsequent flaking and contamination of a wafer being processed.

Gas distribution system

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Pleasant Valley, NY, United States of America

Joseph F Salfelder