Xicor Corporation

Other

Joseph Drori

William H Owen

John M Caywood

Ping Wang

James M Jaffe

Isao Nojima

Allan Ming-Lun Lin

Jeffrey Sung

Richard T Simko

William H Owen, Iii

William S Jennings Check

Zavdi Lichtman

William S Check

It is a principal goal of the present invention is to provide a uroflowmetry device for calculating uroflowmetry data (flow rate and other data) associated with urination sessions. The invention is an in-toilet uroflowmetry device, which unlike existing stand-alone and in-toilet devices is not touched by the urine stream, and un-like with existing in-toilet devices, the toilet is useable for all normal functions by men and women. The invention also provides new data not provided by existing uroflowmetry devices. The present invention is a device comprised of an electronic open loop belt with video cameras, a single-board computer (SBC), LEDs and various sensors to start the video cameras and control the LEDs. The video data is transferred wirelessly to a website where image processing is performed on the video data, followed by computations of flow rate and additional uroflowmetry data.

Imaged-based uroflowmetry device

A serial communication method and system is provided for use with a battery management system. The system includes a port capable of sending and receiving pulses over a single conductor, serial interface logic compatible with a serial protocol and capable of generating and detecting signals on the port and communicating the signals with an internal bus in the battery management system wherein each signal in the serial protocol is defined by a specific number of pulses. In the serial protocol, a zero signal corresponds to a sequence of two pulses, a one signal corresponds to a sequence of three pulses, an acknowledge signal corresponds to a sequence of four pulses, and a start signal corresponds to a sequence of five pulses.

Serial interface for a battery management system

Disclosed are solid-state potentiometers having high resolution and high accuracy. An exemplary potentiometer comprises a first main terminal, a second main terminal, a wiper terminal, and a resistor stack comprising a plurality M of resistors coupled in series to one another at a plurality of M&minus;1 internal nodes. Each of the resistors in the stack has substantially the same value of R ohms. The potentiometer further comprises a first variable resistance network coupled between one end of the resistor stack and the potentiometer's first main terminal, and a second variable resistance network coupled between the other end of the resistor stack and the potentiometer's second main terminal. The first variable resistance network has a variable resistance value R which varies between zero ohms and R ohms. The second variable resistance network has a variable resistance value R which is maintained substantially at value of (R &minus;R ). The wiper terminal is selectively coupled to one of the internal nodes of the resistor stack, or to one of the ends of the resistor stack, to provide a coarse setting of the potentiometer's wiper position. The resistances of the variable resistance networks are changed to provide the fine resolution for the potentiometer's wiper position. The present invention provides a large number of discrete wiper positions with a constant end-to-end resistance, while using a small number of resistors and transistors relative to prior art implementations. A further advantage of the invention is that the potentiometer may be constructed with a small number of selection transistors turned on within the current path between the potentiometer's main terminals, thereby providing higher accuracy.

High-resolution, high-precision solid-state potentiometer

An integrated power and sense device provides a current used in measuring the charge of a rechargeable battery. The charge measurement apparatus for a rechargeable battery powered system includes an integrated power and sense device having a power device and a sense device, connected to the rechargeable battery and a load; the sense device operatively coupled to provide a mirror current that is a fixed ratio of the current in the power device, and a first circuit that uses the mirror current to measure the charge in the rechargeable battery.

Method and apparatus for measurement of charge in a battery

A battery management system is provided having a battery management unit (BMU) and an integrated switch and sense device (SSD) for accurately measuring the charge state of a rechargeable battery and providing charge protection for the rechargeable battery. The system includes a load, a integrated power and sense device including a power device and a sense device, the integrated power and sense device connected between the rechargeable battery and the load wherein the sense device provides a mirror current proportional to the current in the power device, a first circuit that measures the rechargeable battery current using the mirror current, and a second circuit that measures the charge in the rechargeable battery using the mirror current.

Battery management system

Disclosed are solid-state potentiometers having high resolution and high accuracy. An exemplary potentiometer has a first main terminal, a second main terminal, a wiper terminal, and a resistor stack having a plurality M of resistors coupled in series to one another at a plurality of M&minus;1 internal nodes. Each of the resistors in the stack has substantially the same value of R,ohms. The potentiometer further has a first variable resistance network coupled between one end of the resistor stack and the potentiometer's first main terminal, and a second variable resistance network coupled between the other end of the resistor stack and the potentiometer's second main terminal. The first variable resistance network has a variable resistance value R,which varies between zero ohms and R,ohms. The second variable resistance network has a variable resistance value R,which is maintained substantially at value of (R,&minus;R,). The wiper terminal is selectively coupled to one of the internal nodes of the resistor stack, or to one of the ends of the resistor stack, to provide a coarse setting of the potentiometer's wiper position. The resistances of the variable resistance networks are changed to provide the fine resolution for the potentiometer's wiper position. The present invention provides a large number of discrete wiper positions with a constant end-to-end resistance, while using a small number of resistors and transistors relative to prior art implementations.

A battery management system is provided having a battery management unit (BMU) and an integrated switch and sensor unit (SSU) for accurately measuring the charge state of a rechargeable battery and providing charge protection for the rechargeable battery. The system uses a charger unit to charge the rechargeable battery and a combination sensor switch circuit having a first and second mirror current proportional to the current used to charge and discharge the rechargeable battery. The switch function in sensor switch circuit disconnects the battery from receiving additional charge when a disconnect signal is provided. A battery management unit is used to detect conditions such as over voltage, over current, and over temperature associated with the rechargeable battery and transmit the disconnect signal to the sensor and switch unit when at least one condition is detected.

Gas gauge implementation

A field-programmable redundancy apparatus for integrated circuit semiconductor memory arrays is disclosed. The present invention allows the user to replace a defective memory cell with a redundant memory cell while the integrated circuit memory array is in the field. The user communicates with the redundancy apparatus over standard signal paths of the integrated circuit semiconductor memory array and with standard voltage levels. The redundancy apparatus detects a predetermined code sequence on one or more of the address and data lines of the memory array to enter a special redundancy-reconfiguration mode. In the reconfiguration mode, the redundancy apparatus provides information on the availability and functionality of the redundant memory cells and enables the user to replace a defective memory cell with a selected redundant memory cell. The field-programmable redundancy apparatus may comprise nonvolatile memory means, such as EEPROM's, to store the replacements of primary memory cells with redundant memory cells. In the reconfiguration mode, detection of a second predetermined code sequence causes the reconfiguration mode to be exited.

Field-programmable redundancy apparatus for memory arrays

A field-programmable redundancy apparatus for integrated circuit semiconductor memory arrays is disclosed. The present invention allows the user to replace a defective memory cell with a redundant memory cell while the integrated circuit memory array is in the field. The user communicates with the redundancy apparatus over the standard signal paths with standard voltage levels of the integrated circuit semiconductor memory array. The redundancy apparatus detects a predetermined code sequence on one or more of the address and data lines of the memory array to enter a special redundancy-reconfiguration mode. In the reconfiguration mode, the redundancy apparatus provides information on the availability and functionality of the redundant memory cells and enables the user to replace a defective memory cell with a selected redundant memory cell. The field-programmable redundance apparatus may comprise nonvolatile memory means, such as EEPROM's, to store the replacements of primary memory cells with redundant memory cells. In the reconfiguration mode, detection of a second predetermined code sequence causes the reconfiguration mode to be exited.

A variable impedance circuit for use in an external circuit is disclosed. The impedance value is selected by an external circuit. The variable impedance is generated between two terminals which are accessible for connection to external circuitry. The impedance provided between these terminals is determined by a control circuit responsive to electrical signals coupled to the control circuit. An internal register in the control circuit stores a value which specifies the impedance between the two terminals. The stored value is copied into a programmable nonvolatile read-only memory in response to a first predetermined electrical signal. Similarly, the value stored in the read-only memory is selectively copied into the internal control circuit register in response to a second predetermined electrical signal. A number of embodiments of variable impedance elements are disclosed which minimize the number of separate resistors required to achieve the equivalent resolution achievable using a series arrangement of resistors.

Nonvolatile nonlinear programmable electronic potentiometer

A variable impedance circuit for use in an external circuit. The impedance value may be altered by an external circuit. The invention consists of a plurality of two terminal impedance elements connected in series. A node is provided between each pair of impedance elements in the series chain. At least one of the first element and last elements in the series chain are connected to terminals which are accessible for connection to the external circuit. Each of the nodes may be connected to a terminal which is also accessible for connection to the external circuit. An electrically reprogrammable read-only memory stores the identity of the node connected such that the identity of this node is retained when power is removed from the invention. When power is returned to the invention, the node which was previously connected to the terminal is automatically reconnected.

Nonvolatile reprogrammable electronic potentiometer

An integrated circuit system for generating a regulated high voltage tunneling pulse whose voltage level varies as a function of the voltage level needed to initiate tunneling of electrons across one or more dielectric gaps between respective first and second regions. The voltage level of initial electron tunneling is compared with a predetermined voltage margin so as to cause said generated tunneling voltage pulse to have a voltage level equal to the sum of said detected tunneling voltage and said voltage margin. The tunneling voltage pulse is then maintained substantially at this level for a predetermined duration before the tunneling pulse is discharged.

Growing community of inventors

San Jose, CA, United States of America

Joseph Drori