Dell Products Inc.

Dell USA L.p.

Other

Joseph Daniel Mallory

Arnold Thomas Schnell

Deeder M Aurongzeb

Yagiz Can Yildiz

Alan E Brown

Nikolai V Vyssotski

Deepak N Swamy

Lawrence Allen Stone

Joseph A Vivio

Joshua Titus

Michael D Ohlinger

Robert B Petty

Bryan R Franklin

A memory module includes a printed circuit board and a Low-Power Double Data Rate (LPDDR) memory device. The printed circuit board includes surface contact connections on a first surface of the printed circuit board and located at a first portion of the printed circuit board. The LPDDR memory device is on a second surface of the printed circuit board and located at a second portion of the printed circuit board. The LPDDR memory device is configured to be coupled to an information handling system via the surface contact connections. The second portion of the printed circuit board is adjacent to the first portion of the printed circuit board.

Compression attached memory module (CAMM) for low-power double data rate (LPDDR) memories

A compression attached memory module (CAMM) includes a memory device, a first array of compression contact pads and a second array of compression contact pads. The first array of compression contact pads receives a first memory channel and a second memory channel. The first memory channel is coupled to the first memory device. The second array of compression contact pads is coupled to a subset of the first compression contact pads associated with the second memory channel.

Compression attached memory module for offset stacking

A z-axis compression connector includes a plurality of high-speed signal contacts arranged in a grid of M rows by N columns, and a plurality of signal return contacts arranged between the N columns. A first signal return contact is positioned mid-way in line between a first signal contact and a second signal contact, where the first signal contact is in a first row and a first column and the second signal contact is in the first row and a second column adjacent to the first column.

System and method for providing compression attached memory module compression connectors

An information handling system includes a printed circuit board, a z-axis compression connector, and a compression attached memory module (CAMM). The compression connector coupled receives a first memory channel and a second memory channel from the PCB. The CAMM receives the first memory channel and the second memory channel from the first compression connector. The CAMM is configured to provide memory transaction on only the first memory channel.

System and method for providing compression attached memory module offset stacking

Information handling system (IHS) heatsinking systems and methods may employ a thermally conductive compression attached memory module (CAMM) bolster plate affixed to one surface of a circuit board of the CAMM, between a central processing unit (CPU) of the IHS and memory devices mounted on the CAMM, to provide compression between the CAMM and a z-axis compression connector and to capture and dissipate heat from the CPU and the memory devices. Spacing between the CPU and the DIMM may enable this capture and dissipation of heat from the CPU. The bolster plate may be configured to receive at least one conductive fastener that bears on the bolster plate and presses the CAMM to the z-axis compression connector, and to conductively thermally couple the CAMM and bolster plate to a ground plane of a system printed circuit board (PCB) mounting the CPU and the CAMM.

Thermal heatsink systems and methods in information handling systems

Embodiments of systems and methods for a Compression Attached Memory Module (CAMM) for Low-Power Double Data Rate (LPDDR) memories are described. In an illustrative, non-limiting embodiment, an Information Handling System (IHS) may include: a compression Dual In-Line Memory Module (cDIMM) connector coupled to a motherboard; and a memory module coupled to the cDIMM connector, where the memory module comprises an LPDDR device coupled to a top surface of the memory module and accessible via surface contact connections disposed on a bottom surface of the memory module.

An information handling system includes a first z-axis compression connector having a first depth, a first memory module, a second z-axis compression connector having a second depth that is greater than the first depth, a second memory module, and a printed circuit board. A first side of the first compression connector is affixed to the printed circuit board at a first location and a first surface of a first memory circuit board of the first memory module is affixed to a second side of the first compression connector. A first side of the second compression connector is affixed to the printed circuit board at a second location adjacent to the first location and the first side of a second memory circuit board of the second memory module is affixed to a second side of the second compression connector.

System and method for stacking compression attached memory modules

An information handling system includes a first z-axis compression connector, a first dual in-line memory module (DIMM), a second z-axis compression connector, a second DIMM, and a printed circuit board. A first side of the first compression connector is affixed to the printed circuit board. A first surface of a first memory circuit board of the first DIMM is affixed to a second side of the compression connector. A first side of the second compression connector is affixed to a second side of the first memory circuit board. A first side of a second memory circuit board of the second DIMM is affixed to a second side of the second compression connector. The first compression connector has a first depth, and the second compression connector has a second depth that is different from the first depth.

System and method for stacking compression dual in-line memory module scalability

A Dual In-Line Memory Module (DIMM) includes a plurality of memory devices mounted on a circuit board of the DIMM. The memory devices are arranged to be accessed via at least two memory channels. The DIMM further includes an array of surface contact connections. Each surface contact connection is configured to be engaged with an associated contact element of a z-axis compression connector. The array of surface contact connections are arranged to conduct signals for the memory channels. The memory devices are placed upon the memory circuit board in an array of X rows of memory devices and Y columns of memory devices, where X and Y are integers. When the DIMM has a first number of the memory devices A=X&#xd7;Ythat is less than when the DIMM has a second number of memory devices B=X&#xd7;Y, then either Xis less than X, or Yis less than Y.

System and method for compression dual in-line memory module scalability

A dual in-line memory module (DIMM) includes memory devices arranged to be accessed via at least one memory channel. The DIMM further includes an array of surface contact connections each configured to be engaged with an associated contact element of a z-axis compression connector. The array of surface contact connections are arranged to conduct signals for the memory channels.

System and method for compression Dual In-Line Memory Module reversibility

An information handling system for interacting with a peripheral interaction device having a plurality of conductive pads comprising a display screen having a touch screen including a touch sensor device that detects contact by a polymer conductor interface device assembly having a plurality of conductive pads, a processor executing instructions for a peripheral interaction device degradation management system that determines whether there is degradation in the touch signal response of at least one conductive pad of the polymer conductor interface device assembly below a degradation threshold signal level; and the processor adjusting drive signal voltages if a touch signal response falls below the degradation threshold signal level.

System and method of management for a peripheral interaction device for a graphical user interface touch system

A cable puller has a pair of shoulder bars connected to each other at one end thereof, each of the shoulder bars having a hook at the other end for releasably accommodating a plurality of wires or cables thereon; and a support bar with two ends respectively and symmetrically connected to respective intermediate points of the shoulder bats. The shoulder and support bars are arranged to provide a shoulder width wider than a depth of an enclosed space to pull the cable therethrough and narrower than a pre-determined pathway in the enclosed space the cables are designed to be pulled therealong.

Adjustable cable puller

A method of implementing bi-directional level translation in an information handling system includes coupling a first device port via a first resistor to a first voltage. A second device port is coupled via a second resistor to a second voltage different from the first voltage. Lastly, a single bipolar junction transistor (BJT) couples the first device port to the second device port, the single bipolar junction transistor including an emitter coupled to the first device port, a base coupled via a third resistor to the first voltage, and a collector coupled to the second device port, wherein the bipolar junction transistor operates as a bi-directional level translator between the first and second device ports.

Growing community of inventors

Cedar Park, TX, United States of America

Joseph Daniel Mallory