Texas Instruments Corporation

Joseph D Luttmer

Rudy L York

Cecil J Davis

Patricia Beauregard Smith

Larry D Hutchins

Changming Jin

Lee M Loewenstein

Robert T Matthews

Rhett B Jucha

Julie S England

Jerome Lee Elkind

Randall C Hildenbrand

Qing-Tang Jiang

Thomas W Orent

Art Simmons

Chang F Wan

William R McKee

Hong Yang

Chang-Feng Wan

Richard Scott List

Wei William Lee

Charles E Williams

Dean W Freeman

D Dawn Little

Kent R Carson

Elwin L Johnson

Stephen T Tso

Dwain R Jakubik

James B Hunter

David E Fleming

A method of manufacturing a semiconductor device includes the steps of providing a semiconductor substrate (), forming a dielectric layer () over the semiconductor substrate (), and etching a trench or a via () in the dielectric layer () to expose a portion of the surface of the semiconductor substrate (). The method also includes the step of forming a conductive layer () within in the trench or the via (). The method further includes the steps of polishing a portion of the conductive layer () and annealing the conductive layer () at a predetermined temperature. Moreover, the conductive layer () also includes a dopant, and the dopant diffuses substantially to the surface of the top side of the conductive layer () to form a dopant oxide layer () when the conductive layer () is annealed at the predetermined temperature and the dopant is exposed to oxygen.

Semiconductor device with a conductive layer including a copper layer with a dopant

Semiconductor devices and methods of manufacturing such semiconductor devices

A xerogel aging system includes an aging chamber ( ) with inlets and outlet and flows a gel catalyst in gas phase over a xerogel precursor film on a semiconductor wafer. Preferred embodiments use an ammonia and water vapor gas mixture catalyst.

Integrated circuit dielectric and method

A phase separation during solvent evaporation of a solution containing polymer precursors leaves low pressure solvent without polymer precursor in minimal gaps. After polymerization, drive off the low pressure solvent to yield air gaps in the minimal gaps under the polymer.

Method of forming integrated circuit dielectric by evaporating solvent to yield phase separation

A method of fabricating an oxidation barrier for a thin film is provided. The method may include forming a thin film (10) outwardly from a semiconductor substrate (12) and separated from the semiconductor substrate (12) by a primary insulator layer (14). A reactive layer (16) may be formed in-situ adjacent to the thin film (10). An oxidation barrier (20) may be formed by a chemical reaction between the thin film (10) and the reactive layer (16). The oxidation barrier (20) may comprise a silicide alloy that operates to reduce oxidation of the thin film (10).

Oxidation barrier composed of a silicide alloy for a thin film and

Channel stops for MIS infrared photodetector devices in Hg.sub.1-x Cd.sub.x Te by lattice damage (454) between and automatically aligned to MIS gates (408). Also, field plates and guard rings are automatically aligned to MIS gates.

Method of making infrared detector with channel stops

A processing apparatus and method wherein a wafer is exposed to activated species generated by a first plasma which is separate from the wafer, but is in the process gas flow stream upstream of the wafer, and is also exposed to plasma bombardment generated by a second plasma which has a dark space which substantially adjoins the surface of the wafer. The in situ plasma is relatively low-power, so that the remote plasma can generate activated species, and therefore the in situ plasma power level can be adjusted to optimize the plasma bombardment. Ultraviolet light to illuminate the face of a wafer being processed is generated by a plasma which is within the vacuum chamber but is remote from the face of the wafer. It is useful to design the gas flow system such that the ultraviolet-generating plasma has its own gas feed, and the reaction products from the ultraviolet-generating plasma do not substantially flow or diffuse to the wafer face. A transparent isolator is usefully included between the ultraviolet plasma space and the processing space near the wafer face, so that the ultraviolet plasma can be operated at a vacuum level slightly different from that used near the wafer face, delete but this transparent window is not made thick enough to act as a full vacuum seal.

Processing method using both a remotely generated plasma and an in-situ

Method of manufacturing an infrared detector having a refractory metal (16) within the metal-insulator-semiconductor structure (MIS) provides a process applicable for high volume production of infrared focal plane array detectors. The process of the present invention uses a refractory metal such as tantalum as the gate (16) which is less susceptible to the etching by the bromine solution used to etch the vias (22) as compared to aluminum. Additionally, the etching of the refractory metal film to form the MIS structure can be done with a fluorine-containing plasma, thus avoiding the corrosion of the metal associated with etching aluminum metal films in a chlorine-containing plasma.

Method for forming an infrared detector having a refractory metal

A process is disclosed through which vias (50) can be formed by the reaction of an etchant species (52) with a mercury cadmium telluride (HgCdTe) or zinc sulfide (ZnS) layer (42). The activating gases (20) are preferably a hydrogen gas or a methane gas which is excited in a diode plasma reactor (100) which has an RF power source (13) applied to one of two parallel electrodes. The etching occurs in selected areas in a photoresist pattern (44) residing over the ZnS or HgCdTe layer (42). Wet etching the layer (42) with a wet etchant (54) following the dry etching, improves the via (50) by making the walls (48) smoother, and allowing for expansion of the vias (50) to a dimension necessary for proper operation of a HgCdTe-based infrared detector.

Method for dry etching openings in integrated circuit layers

A processing apparatus and method wherein a wafer is exposed to activated species generated by a first plasma which is separate from the wafer, but is in the process gas flow stream upstream of the wafer, and is also exposed to plasma bombardment generated by a second plasma which has a dark space which substantially adjoins the surface of the wafer. The in situ plasma is relatively low-power, so that the remote plasma can generate activated species, and therefore the in situ plasma power level can be adjusted to optimize the plasma bombardment. Ultraviolet light to illuminate the face of a wafer being processed is generated by a plasma which is within the vacuum chamber but is remote from the face of the wafer and controlled independent of the in situ plasma. It is useful to design the gas flow system such that the ultraviolet-generating plasma has its own gas feed, and the reaction products from the ultraviolet-generating plasma do not substantially flow or diffuse to the wafer face. A transparent isolator is usefully included between the ultraviolet plasma space and the processing space near the wafer face, so that the ultraviolet plasma can be operated at a vacuum level slightly different from that used near the wafer face.

Wafer processing apparatus having independently controllable energy

Method and apparatus for forming an infrared detector having a

The deposition of zinc sulfide films (16) using dimethylzinc (46) and hydrogen sulfide (44) in a vacuum processor reactor (50) provides a low temperature process applicable for high volume production of infrared focal planes. These layers (16) of zinc sulfide are used as insulators and infrared anti-reflective coatings which are free of contamination relative to physical vapor deposited ZnS films. The zinc sulfide layers (16) are formed by evacuating a chamber (62) and mixing hydrogen sulfide gas (44) and dimethylzinc gas (46) at specific operating conditions until the desired ZnS film thickness is obtained. The rate of growth of the zinc sulfide (16) film is controlled by varying the temperature, pressure, and the relative flow rates of the hydrogen sulfide gas (44) and the dimethylzinc gas (46).

Method and apparatus for deposition of zinc sulfide films

Method for dry etching vias in integrated circuit layers

A processing apparatus and method for depositing a silicon oxide layer on a temperature sensitive wafer utilizing a single process chamber provide nitrous oxide gas to the chamber with the excitation energy being provided by a remotely generated plasma while supplying silane gas in combination with illuminating the wafer with an in situ generated ultraviolet energy to produce the silicon oxide layer.

Method for deposition of silicon oxide on a wafer

A processing apparatus and method wherein two separate gas feeds are provided in proximity to the face of a face down wafer. A shroud can be used to maximize mixing of the two gas feed streams without excessive residence time.

Growing community of inventors

Richardson, TX, United States of America

Joseph D Luttmer