Bae Systems Controls Inc.

Joseph D Cipollina

Thomas J Cummings

A method of determining delamination in a transistor is disclosed including loading a grey scale image of an transistor into memory, generating a black and white image based on the loaded grey scale image, identifying boundaries within the generated black and white image, cropping the black and white image based on the identified boundaries, identifying at least one feature in the cropped black and white image based on the identified boundaries, normalizing the cropped black and white image based on an attribute of the identified at least one feature, cropping the grey scale image based on the normalized black and white image, comparing the cropped grey scale image to a baseline grey scale image of the transistor, and determining a change in a percentage of delamination of the transistor between the baseline grey scale image and the cropped grey scale image based on the comparison.

Growing community of inventors

Binghamton, NY, United States of America

Joseph D Cipollina