Fortinet, Inc.

Google Inc.

Microsoft Technology Licensing, LLC

Joseph Cheng

Zahid S Hussain

Tim Millet

Naveed Alam

Sachin Desai

Samir Jain

Greg Lockwood

Gregory Lockwood

Methods and systems for hardware-accelerated packet multicasting are provided. According to one embodiment, a first multicast packet to be multicast to a first multicast destination is received by a virtual routing system. The multicast packet is caused to be transmitted to the multicast destination by: (i) directing the multicast packet to a first VR of multiple VRs instantiated within the virtual routing system by selecting the first VR from among the multiple VRs to multicast the multicast packet; (ii) configuring the virtual routing system to use a routing context associated with the selected VR in connection with processing of the multicast packet; (iii) reading at least a portion of the multicast packet from one of multiple multicast address spaces associated with the selected VR; and (iv) forwarding the multicast packet to the first multicast destination. Similar steps are then performed for a second multicast packet.

Hardware-accelerated packet multicasting

Methods and systems for hardware-accelerated packet multicasting are provided. According to one embodiment, a first packet to be multicast to a first destination and a second packet to be multicast to a second destination are received. The first and second packets are classified in accordance with different virtual routers (VRs) of multiple VRs instantiated by a virtual routing engine (VRE) of a virtual routing system by determining a first selected VR to multicast the first packet and a second selected VR to multicast the second packet. For each of the first and second packets: a routing context of the VRE is switched to a routing context associated with the selected VR; at least a portion of the packet is read from one of multiple multicast address spaces associated with the selected VR; and the packet is forwarded to the destination.

Methods and systems for hardware-accelerated packet multicasting are provided. According to one embodiment, a multicast packet is received at an ingress system of a packet-forwarding engine (PFE). Multiple flow classification indices are identified for the multicast packet by the ingress system. The multiple flow classification indices are sent to an egress system of the PFE by the ingress system. A single copy of the multicast packet is buffered in a memory accessible by the egress system. Corresponding transform control instructions are identified by the egress system based on each flow classification index. The single copy of the multicast packet is read from the memory. The multicast packet is transformed to an outgoing packet for each instance of the multicast packet based on the corresponding transform control instructions. The outgoing packet is transmitted for routing to a network.

Methods and systems are provided for applying metering and rate-limiting in a virtual router environment and supporting a hierarchy of metering/rate-limiting contexts per packet flow. According to one embodiment, multiple first level metering options and multiple second level metering options associated with a hierarchy of metering levels are provided. A virtual routing engine receives packets associated with a first packet flow and packets associated with a second packet flow. The virtual routing engine performs a first type of metering of the first level metering options on the packets associated with the first packet flow using a first metering control block (MCB) and performs a second type of metering of the second level metering options on the packets associated with the first packet flow and the packets associated with the second packet flow using a second MCB.

Hierarchical metering in a virtual router-based network switch

Methods and systems are provided for hardware-accelerated packet multicasting in a virtual routing system. According to one embodiment, a virtual routing engine (VRE) including virtual routing processors and corresponding memory systems are provided. The VRE implements virtual routers (VRs) operable on the virtual routing processors and associated routing contexts utilizing potentially overlapping multicast address spaces resident in the memory systems. Multicasting of multicast flows originated by subscribers of a service provider is simultaneously performed on behalf of the subscribers. A VR is selected to handle multicast packets associated with a multicast flow. A routing context of the VRE is switched to one associated with the VR. A packet of the multicast flow is forwarded to multiple destinations by reading a portion of the packet from a common buffer for each instance of multicasting and applying transform control instructions to the packet for each instance of multicasting.

Hardware-accelerated packet multicasting in a virtual routing system

Methods and systems are provided for routing traffic through a virtual router-based network switch. According to one embodiment, a flow data structure is established that identifies current packet flows associated with multiple virtual routers in the virtual router-based network device. When an incoming packet is received by the virtual router-based network device, it is then determined whether the incoming packet is associated with a current packet flow by accessing the flow data structure based on a header associated with the incoming packet. If it is determined that the incoming packet is associated with the current packet flow, then the incoming packet is hardware forwarded via a network interface of the virtual router-based network device without intervention by a processor of the virtual router-based network device, otherwise the incoming packet is forwarded to software on the processor for flow learning.

Routing traffic through a virtual router-based network switch

Methods and systems are provided for hardware-accelerated packet multicasting in a virtual routing system. According to one embodiment, a multicast packet is received at an ingress system of a packet-forwarding engine (PFE). The ingress system identifies flow classification indices for the multicast packet. Then, for each instance of multicasting, the ingress system sends a single copy of the multicast packet and the flow classification indices to an egress system of the PFE. The single copy of the multicast packet is buffered in a memory accessible by the egress system. The egress system prepares the multicast packet for transmission by for each flow classification index, identifying corresponding transform control instructions based on the flow classification index, reading the single copy of the multicast packet from the memory, causing the multicast packet to be transformed in accordance with the identified transform control instructions and outputting the transformed multicast packet.

Methods and systems are provided for applying metering and rate-limiting in a virtual router environment and supporting a hierarchy of metering/rate-limiting contexts per packet flow. According to one embodiment, multiple first level metering options and multiple second level metering options associated with a hierarchy of metering levels are provided. A virtual routing engine receives packets associated with a first packet flow and packets associated with a second packet flow. The virtual routing engine performs a first type of metering of the first level metering options on the packets associated with the first packet flow using a first metering control block (MCB) and performs a second type of metering of the second level metering options on the packets associated with the first packet flow and the packets associated with the second flow using a second MCB.

Methods and systems are provided for routing traffic through a virtual router-based network switch. According to one embodiment, a method for routing packets in a router includes establishing a flow data structure, which identifies a packet flow through a virtual router in the router. When a packet is received, a comparison is performed between a subset of at least one packet header associated with the packet and a subset of the flow data structure. If the subset of the packet header matches the subset of the flow data structure, then the packet can be hardware accelerated to a network interface. Otherwise, the packet may be either dropped or forwarded to a general purpose processor for processing.

A packet-forwarding engine (PFE) of a multiprocessor system uses an array of flow classification block (FCB) indices to multicast a packet. Packets are received and buffered in external memory. In one embodiment, when a multicast packet is identified, a bit is set in a packet descriptor and an FCB index is generated and sent with a null-packet to the egress processors which generate multiple descriptors with different indices for each instance of multicasting. All the descriptors may point to the same buffer in the external memory, which stores the multicast packet. A DMA engine reads from the same buffer multiple times and egress processors may access an appropriate transform control block (TCB) index so that the proper headers may be installed on the outgoing packet. The buffer may be released after the last time the packet is read by setting a particular bit of the FCB index.

System and method for hardware accelerated packet multicast in a virtual routing system

A method for routing packets in a router includes establishing a flow data structure identifying a packet flow through a virtual router in the router. Next, a system executing the method receives a packet, said packet having at least one packet header. The method then compares a subset of the at least one packet header to a subset of the flow data structure. If the subset of the at least one packet header matches the subset of the flow data structure, then the packet can be hardware accelerated to a network interface. Otherwise, the packet can be either dropped, or forwarded to a general purpose processor for processing.

System and method for routing traffic through a virtual router-based network switch

A virtual routing platform includes a line interface a plurality of virtual routing engines (VREs) to identify packets of different packet flows and perform a hierarchy of metering including at least first and second levels of metering on the packet flows. A first level of metering may be performed on packets of a first packet flow using a first metering control block (MCB). The first level of metering may be one level of metering in a hierarchy of metering levels. A second level of metering on the packets of the first packet flow and packets of a second flow using a second MCB. The second level of metering may be another level of metering in the hierarchy. A cache-lock may be placed on the appropriate MCB prior to performing the level of metering. The first and second MCBs may be data structures stored in a shared memory of the virtual routing platform. The cache-lock may be released after performing the level of metering using the MCB. The cache-lock may comprise setting a lock-bit of a cache line index in a cache tag store, which may identify a MCB in the cache memory. The virtual routing platform may be a multiprocessor system utilizing a shared memory having a first and second processors to perform levels of metering in parallel. In one embodiment, a virtual routing engine may be shared by a plurality of virtual router contexts running in a memory system of a CPU of the virtual routing engine. In this embodiment, the first packet flow may be associated with one virtual router context and the second packet flow is associated with a second virtual router context. The first and second routing contexts may be of a plurality of virtual router contexts resident in the virtual routing engine.

System and method for hierarchical metering in a virtual router based network switch

A system for performing multi-texturing operations includes a texture generation pipeline operable to receive a first graphics fragment and a second graphics fragment, to generate a first plurality of texels corresponding to the first fragment, and to generate a second plurality of texels corresponding to the second fragment. The system also includes a color pipeline coupled to the texture generation pipeline. The color pipeline is operable to receive the first and second graphics fragments and the first and second plurality of texels, and to generate a first color value for the first fragment and a second color value for the second fragment. The color pipeline is also operable to combine the first color value and the first plurality of texels, and to at least begin combining the second color value and the second plurality of texels during the combination of the first color value and the first plurality of texels.

Growing community of inventors

Sunnyvale, CA, United States of America

Joseph Cheng